Welch Allyn Atlas Service Manual page 93

B.W. = .06Hz to 16 Hz
C712
3.3uF
Resp-AC
D605-C
R718 R719
825K 51.1K
Q701-d
E
2
Q701
MMBF4393L 1
E
2.8 SpO2 Circuits
The SpO2 transducer senses oxygen content of functional arteriolar hemoglobin through the use of light
(red and infrared) passed through the sensor. The reflective characteristics of hemoglobin at the
wavelengths used allow the pulse oximetry circuits to obtain changing saturation levels. This data is then
processed to obtain the oxygen saturation percentage and pulse rate.
Nellcor or Nonin Medical provides the SpO2 board (Nonin only for the model 621). The SpO2 board
includes amplifiers and processing, and transmits serial data to the CPU board (Waveform data, SpO2%,
and pulse rate). The Atlas monitor provides electrical isolation (power and data) for the SpO2 board. Note
that you must use Nonin probes with the Nonin SpO2 board, and Nellcor probes with Nellcor SpO2 board.
Non-Isolated circuits - A/D and Mux
3
3.1 A/D – grounded circuits
The A/D converter is designed by building a pulse width modulator (PWM) and a timer circuit. The PWM
runs at a 1.2KHz rate, synchronized by the A/D sync signal (NIBP-ADC-Clock). A/D sync is low for
52.1uSec, high for 781.25uSec. Component values are selected such that the integrator will ramp down
4.7V, and ramp up 7.83V. The voltage at the integrator output (U601-1) is limited to about 5V
[5V*(73.2/83.2) + Vdiode)]. Then, the integrator starts at 5V and ramps linearly down to 0.3V.
The analog input voltage to be digitized and the integrator output are the inputs to comparator U210. The
output of the comparator is low at the start of an A/D cycle, and switches high as the integrator ramp
drops below the input voltage being digitized (see the timing diagram below). A/D conversion is
accomplished by measuring the width of the PWM output signal. The A/D timer runs at 25.175MHz, then
the A/D resolution is about 21000 counts (over 14 bits). Note that since the output of the comparator is
low at the start of the A/D cycle, a resistor divider is formed at the comparator input. This divider reduces
the Analog-In signal by 0.75% [464K/(464K+3.48K)].
Appendix A
fVcc
R720
100K
U703-5 5
+
6
-
C713
0.1uF
fVee
E
U703-6
R722
3 316
E
D706
MMBD1503A
1 2
R723
1Meg
E
Gain =1000
B.W. = 10Hz
7
An-Resp
U703B
AD712
R721
316K
C714
.047uF
Resp-Reset
10/14/99