Welch Allyn Atlas Service Manual page 84

From the raw f+V and f-V voltages, the following supplies are generated for the various patient isolated
circuits:
1. iso+5dig: Regulated 5V supply. This voltage is used to power the opto-isolators, digital control logic,
and 5V digital supply for the Nellcor SpO2 board.
2. s+5V: Regulated +5V supply: Analog 5V supply for the Nellcor SpO2 board. This is also the
reference voltage used in the regulation of f+V.
3. f+5V: Regulated +5V supply: Filtered and buffered from s+5V, this voltage is used for the A/D
reference.
4. s-5V: Regulated –5V supply: Analog –5V supply used for the Nellcor SpO2 board.
5. fVcc: LC Filtered voltage, derived from f+V. This voltage is used to power the Op-Amps used in the
ECG, Respiration, Temperature, and A/D circuits.
6. fVee: LC Filtered voltage, derived from f-V. This voltage is used to power the Op-Amps used in the
ECG, Respiration, Temperature, and A/D circuits.
U407
78L05
8
f+V
IN
C430
.047uF
S
8
VIN
7
FDBK
3
SHTDN
C401
.047uF 6
TAP
2
SENS
4
GND
S
S S
2
f-V IN
3
IN
6
IN
7
IN
C424
.047uF
S
+
S
S
2.2 A/D Circuits
2.2.1 PWM A/D
A pulse width modulator is used as an A/D converter. The PWM runs at a 1.2KHz rate, synchronized by
the A/D sync signal. A/D sync is low for 52.1uSec, high for 781.25uSec. Using the values shown, the
integrator will ramp down 10.01V, and ramp up 25V. The voltage at the integrator output (U601-1) is
limited to about 5V [5V*(73.2/83.2) + Vdiode)]. Then, the integrator starts at 5V and ramps linearly
down to –5V.
The analog input voltage to be digitized and the integrator output are the inputs to a comparator. The
output of the comparator is low at the start of an A/D cycle, and switches high as the integrator ramp
drops below the input voltage being digitized (see the timing diagram below). A/D conversion is
accomplished by measuring the width of the PWM output signal. The A/D timer runs at 25.175MHz, then
the A/D resolution is about 21000 counts (over 14 bits). Hysteresis is added to the comparator to avoid
oscillations during switching. Note that since the output of the comparator is low at the start of the A/D
cycle, a resistor divider is formed at the comparator input. This divider reduces the Analog-In signal by
0.75% [464K/(464K+3.48K)].
Appendix A
1
iso+5Vdig
OUT
C403 C406
+
.047uF 100uF
S S
S
1
s+5V
VOUT
5
ERR
C415
+
1uF
S
U403
LP2951C
1
OUT s-5V
C421
1uF
U404
79L05
S
S
TP452
L401 220uH
fVcc
C434 C431
+
10uF 10uF
S
TP468
L402 220uH
fVee
C435 C432
10uF 10uF
S
Isolated Supply Voltages
Regulation and Filtering
f+V
TP460
R416 U401B
10K LM358 R415
U401-5 5 100
+
7 U401-7
6
-
C418
+
4.7uF
C417
680pF
S S
TP465
10/14/99
TP461
f+5V
C416
.047uF
S