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Renesas ISL6310EVAL1Z User Manual
Renesas ISL6310EVAL1Z User Manual

Renesas ISL6310EVAL1Z User Manual

Two phase buck converter with integrated high current 5v to 12v drivers

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ISL6310EVAL1Z
Two Phase Buck Converter with Integrated High Current 5V to 12V Drivers
Introduction
The progress in many parts of modern power systems such
as DDR/Chipset core voltage regulators, high current low
voltage DC/DC converters, FPGA/ASIC DC/DC converters
and many other general purpose applications keeps
challenging the power management IC makers to come up
with innovative products and new solutions to meet the
increase in power, reduction in size and increase in the
DC/DC converter's efficiency targets. The interleaved
multiphase synchronous buck topology proves again to be
the topology of choice for such high current low voltage
applications.
The ISL6310 is a space-saving, cost-effective solution for
such applications. The ISL6310 is a two-phase PWM control
IC with integrated high current MOSFET drivers. The
integration of 5V to 12V high current MOSFET drivers into
the controller IC marks a departure from the separate PWM
controller and driver configuration of previous multi-phase
product families. By reducing the number of external parts,
this integration allows for a cost and space saving power
management solution.
Output voltage can be programmed using the on-chip DAC
or an external precision reference. A two bit code programs
the DAC reference to one of 4 possible values (0.6V, 0.9V,
1.2V and 1.5V). A unity gain, differential amplifier is provided
for remote voltage sensing, compensating for any potential
difference between remote and local grounds. The output
voltage can also be offset through the use of single external
resistor. An optional droop function is also implemented and
can be disabled for applications having less stringent output
voltage variation requirements or experiencing less severe
step loads.
A unique feature of the ISL6310 is the combined use of both
DCR and r
current sensing. Load line voltage
DS(ON)
positioning and overcurrent protection are accomplished
through continuous inductor DCR current sensing, while
r
current sensing is used for accurate channel-current
DS(ON)
balance. Using both methods of current sampling utilizes the
best advantages of each technique.
Protection features of this controller IC include a set of
sophisticated overvoltage and overcurrent protection.
Overvoltage results in the converter turning the lower
MOSFETs ON to clamp the rising output voltage and protect
the load. An OVP output is also provided to drive an optional
crowbar device. The overcurrent protection level is set
through a single external resistor. Other protection features
include protection against an open circuit on the remote
sensing inputs. Combined, these features provide advanced
protection for the output load.
AN1197 Rev 1.00
Dec 12, 2006
USER'S MANUAL
The ISL6310EVAL1Z evaluation board embodies a 55A to
60A regulator solution targeted at supplying power to the
designated load. The physical board design is optimized for
2 phase operation and ships out configured to provide one of
the following four output voltages (0.6V, 0.9V, 1.2V and 1.5V)
depending on choice of the REF1, REF0 combination set by
DIP switch U2, but can be easily modified to provide any
output voltage values in the range of 0.6V to 2.3V by means
of resistor divider composed of R90, R81.
For further details on the ISL6310, consult the data sheet [1].
The Intersil multi-phase family controller and driver portfolio
continues to expand with new selections to better fit our
customer's needs. Refer to our web site for updated
information: www.intersil.com.
ISL6310EVAL1Z Board Design
The evaluation kit consists of the ISL6310EVAL1Z
evaluation board, the ISL6310 data sheet, and this
application note. The evaluation board is optimized for two
phase operation without droop, the nominal output voltage is
1.5V (with DIP switch U2 set to 11 position) and the
maximum output current is 60A.
The evaluation board provides convenient test points, a DIP
switch for DAC (REF) voltage selection from four possible
values (0.6V, 0.9V, 1.2V and 1.5V), footprint for a resistor
divider for output voltage adjustment up to 2.3V, and an on-
board transient load generator to facilitate the evaluation
process. An on board LED is present to indicate the status of
the PGOOD signal. The board is configured for down
conversion from 5V to 12V to the REF setting.
The printed circuit board is implemented in 6-layer, 2-ounce
copper. Layout plots and part lists are provided at the end of
the application note for this design.
Quick Start Evaluation
The ISL6310EVAL1Z is designed for quick evaluation after
following only a few simple steps. All that is required is two
bench power supplies, Oscilloscope and Load. To begin
evaluating the ISL6310EVAL1Z follow the steps below.
1. Before doing anything to the evaluation board, make sure
the "Enable" switch (S1) and the "Transient Load
Generator" switch (S2) are both in the ON position
corresponding to the converter being disabled and the
transient load generator being turned off.
2. Connect a 12V, 10A Lab power supply between J7 and
J8, this Power supply provides VIN and PVCC (with
original board configuration).
3. Connect a 5V, 1A Lab power supply between J23 and
GND, this Power supply provides VCC bias (and PVCC
bias if the board is configured for 5V PVCC).
AN1197
Rev 1.00
Dec 12, 2006
Page 1 of 21

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Summary of Contents for Renesas ISL6310EVAL1Z

  • Page 1 Two Phase Buck Converter with Integrated High Current 5V to 12V Drivers Rev 1.00 Dec 12, 2006 The ISL6310EVAL1Z evaluation board embodies a 55A to Introduction 60A regulator solution targeted at supplying power to the The progress in many parts of modern power systems such designated load.
  • Page 2 IC ENLL pin to rise to begin regulation. internal drivers can be any voltage from +5V to +12V by After step 6, the ISL6310EVAL1Z should be regulating the simply connecting the desired voltage to the PVCC pin of the output voltage, at the “V...
  • Page 3 “DCR SENSE” points on the VCC12 ISL6310EVAL1Z and then divide that number by the DCR of the inductor. This should give you an accurate reading of the 1µF current through each channel during static loads.
  • Page 4 PHASE1 required is a single resistor between the OFS and VCC pins, or the OFS pin and GND. The ISL6310EVAL1Z has both of these resistor options available on the board. To positively offset the output voltage populate resistor R5. To negatively offset the output voltage populate resistor R7.
  • Page 5 GND> ENLL ENLL 1ms/DIV 1ms/DIV GND> FIGURE 6. ISL6310EVAL1Z START-UP INTO A PARTIALLY CHARGED OUTPUT (V = 1.200V) ICORE, A second scenario can be encountered with a pre-charged output: output being pre-charged above the DAC-set point, as shown in Figure 7. In this situation, the ISL6310 behaves...
  • Page 6: Transient Response

    Board Transient load generator. V(ILOAD) GND> The rising edge transient response of the ISL6310EVAL1Z, is shown in Figure 8. In order to obtain the load current 5µs/DIV waveform shown, the bench-top load is turned off, while the on-board transient generator is pulsing a 25A step for 500s.
  • Page 7 12V input turns on, by tying LGATE to PHASE. Efficiency The efficiency of the ISL6310EVAL1Z board, loaded from 0A to 60A, at both PVCC = 5V and 12V are plotted in Figure 14 for V = 1.5V.
  • Page 8 ISL6310EVAL1Z The offset pin (OFS) allows for small-range (less than 100mV), positive or negative, offsetting of the output voltage. The board is shipped with R90 equal to 0and R82 is not populated to provide an output voltage equal to the internal DAC setting.
  • Page 9 ISL6310EVAL1Z Summary Down-Converting From a Different Input Voltage The ISL6310EVAL1Z is powered from bench supplies, the The ISL6310EVAL1Z evaluation board showcases a highly input labeled ‘+12V’ can be adjusted down as desired. If integrated approach to providing control in a wide variety of experimenting with a lower voltage, be mindful of a few applications.
  • Page 10 ISL6310EVAL1Z ISL6310EVAL1Z Schematic AN1197 Rev 1.00 Page 10 of 21 Dec 12, 2006...
  • Page 11 ISL6310EVAL1Z ISL6310EVAL1Z Schematic AN1197 Rev 1.00 Page 11 of 21 Dec 12, 2006...
  • Page 12 ISL6310EVAL1Z ISL6310EVAL1Z Schematic AN1197 Rev 1.00 Page 12 of 21 Dec 12, 2006...
  • Page 13 ISL6310EVAL1Z ISL6310EVAL1Z Schematic AN1197 Rev 1.00 Page 13 of 21 Dec 12, 2006...
  • Page 14 ISL6310EVAL1Z Bill of Materials for ISL6310EVAL1Z REFERENCE CASE/ MANUF. OR DESIGNATOR PART NUMBER DESCRIPTION FOOTPRINT VENDOR C34, 37, 40, 41, 44, 47, 48 4SEPC560M Capacitor, TH, 8x13mm, 560µF, 4V, 20%, 7m 8x13 mm Sanyo DNP (C29, 30, 33) 4SEPC560M Capacitor, TH, 8x13mm, 560µF, 4V, 20%, 7m 8x13 mm...
  • Page 15 ISL6310EVAL1Z Bill of Materials for ISL6310EVAL1Z (Continued) REFERENCE CASE/ MANUF. OR DESIGNATOR PART NUMBER DESCRIPTION FOOTPRINT VENDOR 164-6219 CONN-PLUG, BANA-INSUL-SDRLESS, RED, Mouser 4.23mm, RA P1-P5, P7-P10, P13-P15, 5002 CONN-GEN, MINI TEST POINT, VERTICAL, Mouser P17, P18, P20, P22, P26, WHITE...
  • Page 16 ISL6310EVAL1Z Bill of Materials for ISL6310EVAL1Z (Continued) REFERENCE CASE/ MANUF. OR DESIGNATOR PART NUMBER DESCRIPTION FOOTPRINT VENDOR 60.4k Resistor, 60.4k, 1/16W, 1% 0603 R15, R16 62k Resistor, 62k, 1/16W, 1% 0603 R18, R20 750 Resistor, 750, 1/16W, 1% 0603 887...
  • Page 17: Top Silk Screen

    ISL6310EVAL1Z ISL6310EVAL1Z Layout TOP SILK SCREEN TOP LAYER (1st) AN1197 Rev 1.00 Page 17 of 21 Dec 12, 2006...
  • Page 18 ISL6310EVAL1Z ISL6310EVAL1Z Layout (Continued) GROUND LAYER (2nd) GND/SIGNAL LAYER (3rd) AN1197 Rev 1.00 Page 18 of 21 Dec 12, 2006...
  • Page 19 ISL6310EVAL1Z ISL6310EVAL1Z Layout (Continued) POWER LAYER (4th) GND LAYER (5th) AN1197 Rev 1.00 Page 19 of 21 Dec 12, 2006...
  • Page 20: Bottom Silk Screen

    ISL6310EVAL1Z ISL6310EVAL1Z Layout (Continued) POWER/SIGNAL LAYER (6th) BOTTOM SILK SCREEN AN1197 Rev 1.00 Page 20 of 21 Dec 12, 2006...
  • Page 21: Sales Offices

    10. It is the responsibility of the buyer or distributor of Renesas Electronics products, or any other party who distributes, disposes of, or otherwise sells or transfers the product to a third party, to notify such third party in advance of the contents and conditions set forth in this document.