Advertisement

Quick Links

BENEFITS and FEATURES
• Wide input voltage range
• Vin = 2.7V to 5.5V
• Complete integrated power solution
• 3x 4A DC/DC Step-Down (Buck) Regulators
• 2x 3A DC/DC Step-Down (Buck) Regulators
• 2x 2A DC/DC Step-Down (Buck) Regulators
• Parallelable Bucks for higher current
• 2x 800mA High PSRR LDOs
• 4x 400mA General Purpose LDOs
• LDO Load Switch Mode
• Space Savings
• Fully integrated
• High Fsw = 1.125MHz to 2.25MHz
• Optimized for 0.47µH Inductor
• Integrated sequencing
• Integrated Constant Current LED Sinks
• Easy system level design
• Configurable Sequencing
• Multiple Wake up Triggers with GPIOs
• Seamless Sequencing of External Supplies
• 11 Programmable GPIOs
• Highly configurable
• µP interface for status reporting and controllability
• Programmable Reset and Power Good GPIO's
• Flexible Sequencing Options
• Multiple Sleep Modes
• Integrated DVS
• I
2
C Interface – 1MHz
APPLICATIONS
• Video processor and core supply voltage.
• Computer Vision.
• AR / VR Applications.
• Connected Home Applications.
• Portable devices.
Data Sheet Rev. B, June 14, 2022 | Subject to change without notice
®
1 of 68
© 2020 Qorvo US, Inc. All rights reserved. Confidential
Advanced PMIC with 7 Bucks, 6 LDOs
GENERAL DESCRIPTION
The ACT88760 PMIC is an integrated ActiveCiPS
power management integrated circuit. It powers a wide
range of processors, including, video processors,
FPGA's, wearables, peripherals, and microcontrollers.
The ACT88760 is highly flexible and can be reconfig-
2
ured via I
C for multiple applications without the need
for PCB changes. The low external component count
and high configurability significantly speeds time to mar-
ket. Examples of configurable options include output
voltage, startup time, slew rate, system level sequenc-
ing, switching frequency, sleep modes, operating
modes etc. ACT88760 is programmed at the factory
with a default configuration. These settings can be opti-
mized for a specific design through the I
The ACT88760 is available in several default configura-
tion. Contact the factory for specific default configura-
tions.
The ACT88760 integrates seven high efficiency switch-
ing regulators, six linear regulators, and eleven GPIOs.
Two LDOs can be configured as load switches. The
eleven GPIOs pins are configurable and used for a va-
riety of system functions.
The ACT88760 is designed to work with a single lithium
ion or lithium polymer batteries with an input voltage up
to 5.5V. It works with input voltages as low as 2.6V.
The seven switching converters are peak current mode,
fixed frequency DC-DC step down converters. Buck1/2
and Buck3/4 can be paralleled for 8A or 6A of output
current. The high switching frequencies allow small in-
ductors which reduce solution size and optimize load
transient response. The converters are internally com-
pensated for small ceramic output capacitors.
Two LDOs are high PSRR with > 70dB. The other for
are general purpose LDOs. LDO5/6 can be configured
as load switches with less than 25mΩ RDSON.
The ACT88760 PMIC is available in a 3.85mm x
3.85mm 81 ball WLCSP package.
ACT88760
TM
2
C interface.
www.qorvo.com

Advertisement

Table of Contents
loading

Summary of Contents for Qorvo ACT88760

  • Page 1 • Programmable Reset and Power Good GPIO’s riety of system functions. • Flexible Sequencing Options The ACT88760 is designed to work with a single lithium • Multiple Sleep Modes ion or lithium polymer batteries with an input voltage up • Integrated DVS to 5.5V.
  • Page 2: Functional Block Diagram

    Switch Driver VINL6 VFB7 1µF LDO6 Buck7 Controller Vref 2x22µF 1µF VFB7 PGND7 AGND www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 2 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 3: Ordering Information

    Note 2: “xxx” represents the CMI (Code Matrix Index) option. The CMI identifies the IC’s default register settings. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 3 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 4 VIN_B7 SW_B7 Figure 1: Pin Configuration – Top View (bumps down) – WLCSP- 81 www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 4 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 5 Feedback for Buck2. Connect to the Buck2 output capacitor. G5, H5, I5 VIN_B7 Dedicated Input Voltage to Buck7 www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 5 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 6 VIN_B6 Dedicated Input Voltage to Buck6 SW_B6 Switch Pin for Buck6 (connect to inductor) www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 6 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 7 Note1: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability. Note2: Measured on Qorvo Evaluation Kit www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 7 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 8: Recommended Operating Conditions

    -40 to 125 °C Note1: AVIN must always be the highest input voltage to the IC. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 8 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 9: Digital I/O Electrical Characteristics

    VOLOD, GPIOx, x = 1-10 Open = 1mA, AVIN = 5.0V, VIO = 1.8 – 5.0V Drain Output Low www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 9 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 10 AVIN > 2.7V, VIO = 1.8V (VIO used for I/O) PWREN, EXT_PG Deglitch Time µs (falling) PWREN, EXT_PG Deglitch Time µs (rising) www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 10 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 11 ALL LDOs are off. ULPM = 1 for all Operating Supply Current (AVIN) µA buck regulator, PMIC in SLEEP/DPSLP mode www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 11 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 12 OFFDLY = 0100 4000 OFFDLY = 0101 8000 OFFDLY = 0110 16000 OFFDLY = 0111 32000 www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 12 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 13 Note1: All Under-voltage Lockout, Overvoltage measurements are referenced between AVIN and AGND pin. Note2: These ONDLY settings are not allowed when UV_FLTMSK = 0 www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 13 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 14 IWARN, Internal High Side Peak Warning threshold as % of ILIM threshold -22.5 Current Limit Warning Threshold. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 14 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 15 Note1: There are three balls for VIN, Buck1/2/7, and SW. Buck1/2/7 are rated for 6A average lifetime rating at 105 deg C junction. Note2: T = +25°C Note3: LSILIM is used for current run-away protection. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 15 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 16 Internal High Side Peak Current At Default Set Point Limit (Cycle-by-Cycle) Tolerance All Other Set Points www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 16 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 17 Note1: There are two balls for VIN, Buck3/4, and SW. Buck3/4 are rated for 4A average lifetime rating at 105 deg C junction. Note2: T = 25°C Note3: LSILIM is used for current run-away protection. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 17 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 18 IWARN, Internal High Side Peak Warning threshold as % of ILIM threshold -22.5 Current Limit Warning Threshold. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 18 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 19 Note1: There are two balls for VIN, Buck5/6, and SW. Buck5/6 are rated for 4A average lifetime rating at 105 deg C junction. Note2: T = +25°C Note3: LSILIM is used for current run-away protection www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 19 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 20 10mA to 250mA in 10us, V = 1.8V, V OUTL , Transient Response (Note1) = 2.7V www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 20 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 21 Effective capacitance including tolerance and Output Capacitance Range µF voltage derating Note1: T = 25°C www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 21 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 22 Power Good Threshold VLDO Rising, % of V Power Good Hysteresis VLDO Falling, % of V www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 22 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 23 Effective capacitance including tolerance and Output Capacitance Range µF voltage derating Note1: T = 25°C www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 23 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 24 Note 2: Load Switch is not robust to faults on output when Current Limit is disabled. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 24 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 25 Note2: No internal timeout for I C operations. Start Stop condition condition Figure 2: I C Data Transfer www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 25 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 26: I 2 C Serial Interface

    C Serial Interface General To ensure compatibility with a wide range of systems, The ACT88760 is a highly integrated PMIC that is de- the ACT88760 uses standard I C commands. The signed to be flexible and work with many system con- ACT88760 always operates as a slave device and is ad- trollers and processors.
  • Page 27 Please contact Qorvo for custom options and minimum order quantities. In the RESET, or “cold” state, the ACT88760 is waiting for the input voltage on AVIN to be within a valid range When modifying only certain bits within a register, take defined by the AVIN_UV and AVIN_OV thresholds.
  • Page 28 The outputs follow their programmed sequenc- ing delay times when turning on or off as they enter or www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 28 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 29 PWREN functionality. It pro- vides a wide range of configurability for setting different www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 29 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 30 T > TSD & REGS ON) DIS_OTS = 0 Figure 4: PWREN State Machine www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 30 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 31 T > TSD & REGS ON) DIS_OTS = 0 Figure 5: PWRON State Machine www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 31 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 32 OFF to POWER SEQENCE START and back to ACTIVE state. Figure 6: Push Button State Machine www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 32 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 33 VSETx registers. Turn on and Turn off Options. The ACT88760 pro- VSET1/2/3 settings do not have any restrictions other vides several options for enabling the IC. These include than they must all be lower than VSET0.
  • Page 34 Dynamic Voltage Scaling Input Voltage Monitoring (SYSMON) On-the-fly dynamic voltage scaling (DVS) for all Buck The ACT88760 monitors the input voltage on the AVIN regulators is available via the I C interface. DVS allows pin to ensure it is within specified limits for system level systems to save power by quickly adjusting the micro- operation.
  • Page 35 VIN < SYSWARN VIN < SYSMON Generated Figure 7: SYSMON and SYSWARN Signals when SYSMON_SD=0 www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 35 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 36 NVM register bit. The SYSWARN sig- nal output is a real-time signal. The IC also has a real- The ACT88760 also has a second level of input voltage time status bit, SYSWARN, that follows the internal monitoring, SYSWARN.
  • Page 37 Bucks) and PWRGOOD[-] bit (for LDOs) has been read via I C to clear the interrupt. After the UV/OV condition The ACT88760 monitors its input voltage at the AVIN is removed, an I C read is required to clear the interrupt.
  • Page 38: Output Current Limit

    Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 38 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 39 Enable this function by setting EN_PWRCYS=1. nIRQ This function turns all outputs off with their programmed The ACT88760 interrupt pin informs the host of any un- power down sequencing and then automatically restarts masked IC faults. In general, anything with a status them with their startup sequencing.
  • Page 40 DPSLP states or when it is enabled or disabled with a GPIO. The regulator’s POK signal does not force the www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 40 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 41: Pin Descriptions

    VIN_Bx PIN DESCRIPTIONS VIN_Bx pins are the dedicated input power pins to the The ACT88760 input and output pins are configurable buck converters. All VIN_Bx pins must be connected to via CMI configurations. The following descriptions refer the same voltage input. Each buck converter’s VIN_Bx to the basic pin functions and capabilities.
  • Page 42 Dynamic Voltage Scaling input – DVS GPIOx System Monitor output – SYSMON The ACT88760 has 11 GPIO pins. The GPIOs allow a variety of functions to be implemented. They can be System Warning output – SYSWARN used as inputs, open-drain outputs, or push-pull outputs.
  • Page 43: General Description

    101%, the buck converter shuts down to save quiescent current until the output www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 43 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 44: Synchronous Rectification

    (DVS). DVS allows the user to optimize the processor’s High range. energy to complete tasks by lowering the processor’s www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 44 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 45: Overcurrent And Short Circuit Protection

    The ACT88760 Buck regulators have a minimum on- time of 85ns. If the calculated on-time is less than the Qorvo recommends that a buck converter’s output volt-...
  • Page 46: Inductor Selection

    Note that when Vin=5V and operating in LPM mode, the output inductor should be 1µH. Output Capacitor Selection The ACT88760 is designed to use small, low ESR, ceramic output capacitors. Buck1/2/7 typically require 2x 22µF output capacitors while Buck3/4/5/6 typically requires a 22µF capacitor.
  • Page 47 100µs softstart time. PLSW mode relies on the General Description current limit setting for softstart. The LDO5/6 POK are ACT88760 features six low drop out linear regulators functional in Load Switch mode. The POK signal is as- (LDO). The six LDOs are separated into three sets of...
  • Page 48 Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 48 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 49 Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 49 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 50: Typical Operating Characteristics

    ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs TYPICAL OPERATING CHARACTERISTICS www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 50 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 51 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 51 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 52 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 52 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 53 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 53 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 54 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 54 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 55 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 55 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 56 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 56 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 57 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 57 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 58 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 58 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 59 CMI 102.E2T is optimized for general IC evaluation. CMI 102. Is intended to be used as a starting point for general IC evaluation. After evaluating this IC, contact Qorvo for available custom IC options. CMI 102.E2T operates with 5V input voltage.
  • Page 60 Voltage Thresholds Voltage Setting Threshold UVLO 2.7V SYSMON SYSWARN 3.1V POK_OV 5.6V VIN_OV 5.8V www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 60 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 61 GPIO10 is programmed as an output LED driver with default 0mA sink current. The sink current can be changed by 0x33h GPIO10_ILED[3:0]. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 61 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 62 0x4Bh for a read address. The CMI 102 7-bit Slave I2C address (for Buck7, LDO1-6) is 0x28h. This results in 0x50h for a write address and 0x51h for a read address. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 62 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 63 Advanced PMIC with 7 Bucks, 6 LDOs CMI 104: ACT88760-104T The ACT88760-104T is a joint development between Qorvo and Inuitive. It is directly compatible with Inuitive’s NU4000 AI Video Processor voltages and sequencing requirements. Inuitive uses the ACT88760-104 to power their NU4000 on their M4.3V reference design.
  • Page 64 Voltage Thresholds Voltage Setting Threshold UVLO 2.7V SYSMON 2.8V SYSWARN POK_OV 5.6V VIN_OV 5.8V www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 64 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 65 GPIO2 is programmed as nRESET output with 40ms delay from Buck3 POK. Will have external pull up. Internal pull up to VIO is okay as VIO is powered by LDO6 externally. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 65 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 66 0x4Bh for a read address. The CMI 104 7-bit Slave I2C address (for Buck7, LDO1-6) is 0x28h. This results in 0x50h for a write address and 0x51h for a read address. www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 66 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 67 ACT88760 ® Advanced PMIC with 7 Bucks, 6 LDOs PACKAGE OUTLINE AND DIMENSIONS www.qorvo.com Data Sheet Rev. B, June 14, 2022 | Subject to change without notice 67 of 68 © 2021 Qorvo US, Inc. All rights reserved. Confidential...
  • Page 68: Product Compliance

    Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information.

Table of Contents