Panasonic VIERA Link SC-ZT2EE Service Manual page 155

18.1.7. MAIN CIRCUIT (1/6)
1 2 3
SCHEMATIC DIAGRAM - 7
A
C MAIN CIRCUIT
R4116
B
R4114
C4108
CN4101
C4110
AGND 30
AINR- 29
AINR+ 28
C4107
AGND
27
AINL+ 26
AINL- 25
C4109
AGND 24
SRBOUT- 23
R4113
SRBOUT+ 22
C R4115
AGND 21
SLBOUT+ 20
SLBOUT- 19
B
TO AGND 18
DSP CIRCUIT SWOUT- 17
(CN1001) SWOUT+ 16
AGND 15
IN SCHEMATIC
COUT+
DIAGRAM - 6 14
COUT- 13
AGND 12
SROUT- 11
SROUT+ 10
D
AGND 9
SLOUT+
8
SLOUT- 7
AGND 6
ROUT- 5
ROUT+ 4
AGND 3
LOUT+ 2
LOUT- 1
JK4001
E
1
R4004
1K
R
2
AUX3 C4006
100P
R4003
1K
L
3
C4005
AUDIO IN
100P
4
R4002
1K
R
5
F
C4002
TV 100P
R4001
1K
L
6
C4001
100P
R4256
JK4002
3
SUBWOOFER
2
OUT
G
1
C4256
390P
H
4 5 6
: +B SIGNAL LINE : -B SIGNAL LINE : AUX/OPTICAL/HDMI AUDIO INPUT SIGNAL LINE
220K AINR-
220K AINR+
1
1
1 AINL+
AINL-
1
220K
220K
R4033 47K R4036 4.7K
R4034 47K
SWOUT-
SWOUT+
COUT+
COUT-
SROUT-
SROUT+
SLOUT+
SLOUT-
42 41 40 39 38 37 36 35 34
C4040 50V4.7
43
ROUT-
44
ROUT+
45 RIGO
[43]SRVIN [29]SWIGO
C4032 50V4.7
46 RVIN [44]SRIGO [30]SWVIN
LOUT+
C4034
10
47 RVC
LOUT-
C4036 16V10
48 ROUT IC4001
C4035 16V10
49 LOUT C1BB00001134
C4033 10
50 LVC ASP
C4031
50V4.7
51 LVIN
[1]AGND [13]ADIFL
52 LIGO
[56]RECR2 [14]ADIFR
53
RECL1
54 RECR1
AUX4_R 55 RECL2
56
C4008
100P
1 2 3 4 5 6 7 8 9
AUX4_L
C4007
100P
AUX3_R
C4004
100P
AUX3_L
C4003
100P
1K
SW_OUT
7 8 9
: AUDIO OUTPUT SIGNAL LINE
IC5572
QR5571
C0DBEKG00004
UNR221300L
VOLTAGE REGULATOR
SWITCH
1
VC
R5572
47K
2 VIN
C5573
16V47
3 GND
C5574
6.3V1000
4
VOUT
5
ADJ
R5573 R5574 R5575
39K 1.2K 10K
C4067
0.01
33 32 31 30 29
AGND 28
AVCC 27
DVDD 26
R4062 100
CLOCK 25
R4061 100
DATA 24
DGND 23
AGND 22
SWin 21
CIN
20
SLIN 19
18
SRIN
RIN 17
LIN
16
AGND 15
10 11 12 13 14
A+7V
TO MAIN
SECTION (4/6)
155
10 11 12
E5503
1 2 3 W_INT
19
INT
W_SSB
18 SSB
W_SCL
C5597
17 SCL
0.01 W_SDI
16
SDI
W_SDO
15
SDO
W_DET
14 WM_DET
J0JBC0000014
LB4708
13
PGND
+5V
12
+5V
11 +7VA
D3.3V 10
AGND
SR_OUT
LB4705 J0JBC0000014
9
CH2_R_OUT
8
AGND
SL_OUT J0JBC0000014
LB4704
7 CH2_L_OUT
PGND 6
AGND
FR_OUT
J0JBC0000014
LB4703
5 CH1_R_OUT
4
AGND
FL_OUT LB4702 J0JBC0000014
3
CH1_L_OUT
C5593 10V1000
2
AGND
LB4701 J0JBC0000014
1
AGND
A+7V
VOL_CLK
VOL_DT
DGND
V_SWIN
V_CIN
V_SLIN
CLK_DSP
R8069 0
1 CLK_DSP
V_SRIN
INTREQ_DSP R8070 1K
2 INTREQ_DSP
V_RIN
BUSY_DSP
R8071 1K
3 BUSY_DSP
V_LIN
RESET_DSP R8072 1K
4
RESET_DSP
AGND
CS_DSP
R8073 0
5 CS_DSP
6
DGND
MOSI_DSP
R8074 1K
7 MOSI_DSP
A-7V
MISO_DSP R8077 1K
8
MISO_DSP
CS_CODEC
R8076 1K
9 CS_CODEC
INTREQ_CODEC R8075 1K
10
INTREQ_CODEC
RESET_CODEC R8078 1K
RESET_CODEC
11
DT_OUT_CODEC R8079 0
12 DT_OUT_CODEC
13 DGND
14
DGND
C5594
15 PGND
1000P
C5591
16
PGND
6.3V330
17 +3.3VD
+3.3VD
18
+3.3VD
19 +5VA
+5VA
20
+5VA
21
PGND
22
PGND
1/6 2/6 3/6
4/6 5/6 6/6
SC-ZT2EE/GS(SU-ZT2EE/GS) MAIN CIRCUIT
13 14
P1
CN4701
1
F
TO
WIRELESS ADAPTER
CIRCUIT (CN4702)
IN SCHEMATIC
DIAGRAM - 14
19
TO MAIN
SECTION (2/6)
CN4103
B
TO
DSP CIRCUIT
(CN1003)
IN SCHEMATIC
DIAGRAM - 5