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PIN
NO.
NAME
34
RST
35
RXIN1
36
VDDRX
37
RXIN0
38
GNDRX
39
XTI
40
XTO
41
AGND
42
VCC
43
FILT
44
VCOM
45
AGNDAD
46
VCCAD
47
VINL
48
VINR
(1) Schmitt trigger input
(2) Schmitt trigger input
(3) Open-drain configuration in I2C mode
(4) Onboard pull-down resistor (50 kΩ, typical)
(5) CMOS Schmitt trigger input
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PCM9211 BLOCK DIAGRAM
BLOCK DIAGRAM
RXIN 0
RXIN 1
RXIN 2
RXIN 3
RXIN 4/ASCKI 0
RXIN 5/ABCKI 0
RXIN 6/ALRCKI 0
RXIN 7/ADIN0
MPIO_ A0
MPIO_ A1
MPIO_ A2
MPIO_ A3
VINL
VINR
VCOM
MPIO _C0
MPIO _C1
MPIO _C2
MPIO _C3
XTI
XTO
MC /SCL
MDI /SDA
MDO /ADR 0
MS/ADR 1
RST
MODE
Copyright © 2010, Texas Instruments Incorporated
5-V
I/O
TOLERANT
I
Yes
Reset Input, active low(2) (4)
I
Yes
Biphase signal, input 1, built-in coaxial amplifier
–
–
Power supply, 3.3 V (typ.), for RXIN0 and RXIN1.
I
Yes
Biphase signal, input 0, built-in coaxial amplifier
-
-
Ground, for RXIN
I
No
Oscillation circuit input for crystal resonator or external XTI clock source input(5)
O
No
Oscillation circuit output for crystal resonator
–
–
Ground, for PLL analog
–
–
Power supply, 3.3 V (typ.), for PLL analog
O
No
External PLL loop filter connection terminal; must connect recommended filter
O
No
ADC common voltage output; must connect external decoupling capacitor
–
–
Ground, for ADC analog
–
–
Power supply, 5.0 V (typ.), for ADC analog
I
No
ADC analog voltage input, left channel
I
No
ADC analog voltage input, right channel
FILT
AUXIN 0
RXIN0
RXIN1
PLL
RXIN2
RXIN3
RXIN4
RXIN5
Clock/ Data
Recovery
RXIN6
RXIN7
RXIN8
Lock Detection
RXIN9
MPIO_ A
RXIN10
SELECTOR
RXIN11
RECOUT 0
DITOUT
RECOUT 1
ADC Mode
ADC
Control
Com. Supply
ADC Standalone
MPIO_ C
SELECTOR
AUXIN1
Divider
OSC
XMCKO
Divider
Function
DIR CS
2
SPI/I C
Control
( 48-bit)
INTERFACE
GPIO/GPO
DIT CS
Data
( 48-bit)
Reset
and Mode
ADC
Set
ANALOG
ANALOG
VCCAD
AGNDAD
VCC
Product Folder Link(s):
AUTO
DIR
DIR
DOUT
ADC
AUXIN0
SCKO/ BCK/LRCK
AUXIN1
Lock :DIR
AUXIN2
Unlock:ADC
AUTO
DIR
ADC
AUXIN0
AUXIN1
AUXIN2
ADC
AUTO
DIR
ADC
AUXIN0
AUXIN1
ADC Clock
(SCK /BCK/LRCK)
XMCKO
Secondary BCK / LRCK
(To MPIO _A & MPO0/1 )
Divider
Selector
EXTRA DIR FUNCTIONS
REGISTER
DIR
DIR
ERROR DETECTION
P and P
f Calculator
C
D
S
Non-PCM DETECTION
f Calculator
S
All Port
Flags
DIR Interrupt
f Calculator
S
DTS-CD/LD Detection
Validity Flag
User Data
POWER SUPPLY
Channel Status Data
BFRAME Detection
DIR
DIR
ALL
Interrupt System
ANALOG
AGND
VDDRX
GNDRX
DVDD
DGND
153
PCM9211
DESCRIPTION
PCM9211
SBAS495 – JUNE 2010
RXIN7
SCKO
BCK
MAIN
OUTPUT
LRCK
PORT
DOUT
DIT
RECOUT0
MPO 0
RECOUT1
MPO0/1
MPO 1
SELECTOR
DITOUT
MPIO_B0
MPIO_B1
AUXOUT
MPIO _B
MPIO_B2
SELECTOR
AUXIN 2
MPIO_B3
SBCK /SLRCK
( to MPIO_A )
ERROR /INT0
NPCM /INT1
MPIO_ A
MPIO_ B
MPIO_ C
MPO0
MPO1
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