Marantz AV7701 Service Manual page 184

Sil9575 (HDMI : IC501)
Sil9575 Block diagram
CEC A0
CBUS/
HPD
DDC
I2C
R0X
R1X
R2X
R3X
R4X
R5X
D[19..0]
ARC0/1 Rx
ARC0/1 Tx
176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145
D14
1
D15
2
D16
3
D17
4
D18
5
D19
6
DE
7
VSYNC
8
HSYNC
9
R0XC-
10
R0XC+
11
R0X0- 12
R0X0+
13
R0X1-
14
R0X1+
15
R0X2-
16
R0X2+ 17
AVDD13
18
AVDD33 19
R1XC-
20
R1XC+
21
R1X0- 22
R1X0+
23
R1X1- 24
R1X1+
25
R1X2- 26
R1X2+ 27
R2XC-
28
R2XC+ 29
R2X0-
30
R2X0+ 31
R2X1- 32
R2X1+
33
R2X2- 34
R2X2+
35
AVDD13 36
CVCC13 37
AVDD33 38
R3XC- 39
R3XC+
40
R3X0- 41
R3X0+ 42
R3X1- 43
R3X1+ 44
45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61
Mobile HD
Control
CBUS0
Serial Ports
CBUS1
DDC0
DDC1
DDC2
DDC3 EDID SRAM
DDC4
DDC5
DDC6
HDCP
Local Registers
I 2 C
TPI HW
Power-Down
Section
A
TMDS Rx
(Port 0)
HDMI/
M
MHL
TMDS Rx
U
Receiver
(Port 1)
X
InstaPort
TMDS Rx
(Port 2)
HDCP
Decryption
TMDS Rx
B
(Port 3)
TMDS Rx
HDMI/
M
(Port 4)
MHL
U
Receiver
X
InstaPort
TMDS Rx
(Port 5)
Parallel
Video
Input
Video
Pattern
Generator
ARC
Input
and
Output
144 143 142 141 140 139 138 137 136 135 134 133
SiI 957n
Top View
62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83
Always-On
Section
CEC Interface
Controller 0
NVRAM
OTP
E
M
U
X
C
Stream
Mixer
M
U
X
InstaPrevue
D
Video/
Audio
M
Splitter
U
X
F
M
U
X
184
96
132 SCK0_IN/GPIO10
131 WS0_IN/GPIO11
SPDIF0_OUT/DL2
130
129 MUTEOUT/GPIO9
SD0_3/DR2/GPIO8
128
127 SD0_2/DL1/GPIO7
126 SD0_1/DR1/GPIO6
MCLK
125
124 SD0_0/DL0
IOVCC33
123
122 SCK0/DDCK
121 WS0_OUT/DR0
SDI/GPIO5
120
119 SD0/GPIO4
SCLK/GPIO3
118
117 SS/GPIO2
CVCC13
116
XTALGND
115
114 XTALIN
XTALOUT
113
112 XTALVCC33
111 APLL13
TXDSCL1
110
109 TXDSDA1
TX_HPD1
108
107 TXDSCL0
106 TXDSDA0
TX_HPD0
105
104 MHL_CD1/GPIO1
MHL_CD0/GPIO0
103
102 VCC33OUT
101 SBVCC5
R5PWR5V
100
99 CBUS_HPD5
DSCL5
98
97 DSDA5
96 RSVDL
R4PWR5V
95
94 CBUS_HPD4
DSCL4
93
92 DSDA4
91 R3PWR5V
CBUS_HPD3
90
89 DSCL3
84 85 86 87 88
CEC A1
CEC Interface
Controller 1
RnPWR5V,
SBVCC5V
Booting
Power
Sequencer
INT
Configuration, Status,
and Interrupt-Control
Registers
DDC TX
I2S/SPDIF/
DSD
Audio Output
Main
Multi-Channel
I2S/SPDIF
Audio Input
SPI
OSD
Main
T0X
TMDS Tx
(Port 0)
HDCP Encryption
SRC
Sub
T1X
TMDS Tx
G (Port 1)
HDCP Encryption
M
U
X
Audio Output
I2S/SPDIF
Sub ENB
2 Channel
Audio Input