Marantz CD6005 Service Manual page 66

CS4398 (IC304)
CS4398 Terminal Function
Pin Name
DSD_A
DSD_B
DSD_SCLK
SDIN
SCLK
LRCK
MCLK
VD
DGND
RST
VLC
FILT+
120 dB, 192 kHz Multi-Bit DAC with Volume Control
REF_GND
VREF
Features
BMUTEC
Advanced Multi-bit Delta-Sigma Architecture
AMUTEC
– 120 dB Dynamic Range
AOUTB+
– -107 dB THD+N
AOUTB-
– Low Clock Jitter Sensitivity
AGND
– VA Differential Analog Outputs
AOUTA+
PCM input
AOUTA-
– 102 dB of Stopband Attenuation
VQ
– Supports Sample Rates up to 192 kHz
VLS
– Accepts up to 24 bit Audio Data
Stand-Alone Mode Definitions
– Supports All Industry Standard Audio
M3
Interface Formats
M2
M1
– Selectable Digital Filter Response
M0
– Volume Control with 1/2 dB Step Size and
Control Port Mode Definitions
Soft Ramp
– Flexible Channel Routing and Mixing
AD1/CDIN
– Selectable De-Emphasis
SCL/CCLK
Supports Stand-Alone or I²C/SPI
SDA/CDOUT
Configuration
Embedded Level Translators
AD0/CS
– 1.8 V to 5 V Serial Audio Input
Block Diagram – 1.8 V to 5 V Control Data Input
DS568F1
1.8 V to 5 V
Hardware or I 2 C/SPI
Control Data
1.8 V to 5V
PCM Input
DSD Input
http://www.cirrus.com
1. PINOUT DRAWING
DSD_B
1
DSD_SCLK
2
SDIN
3
SCLK
4
LRCK
5
MCLK
6
VD
7
DGND
8
M3 (AD1/CDIN)
9
M2 (SCL/CCLK) 10
M1 (SDA/CDOUT) 11
M0 (AD0/CS) 12
RST
13
VLC
14
Pin # Figure 1. Pinout Drawing
28
Direct Stream Digital Input (Input) - Input for Direct Stream Digital serial audio data.
1
2 DSD Serial Clock (Input) - Serial clock for the Direct Stream Digital audio interface.
3 Serial Audio Data Input (Input) - Input for two's complement serial audio data.
4 Serial Clock (Input) - Serial clock for the serial audio interface.
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on
5
the serial audio data line.
6 Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
7 Digital Power (Input) - Positive power for the digital section.
8 Digital Ground (Input) - Ground reference for the digital section.
13 Reset (Input) - The device enters system reset when enabled.
14 Control Port Power (Input) - Positive power for Control Port I/O.
Positive Voltage Reference (Output) - Positive reference voltage for the internal sam-
6
15
pling circuits.
16 Reference Ground (Input) - Ground reference for the internal sampling circuits.
Voltage Reference (Input) - Positive voltage reference for the internal sampling circuits.
17
Mute Control (Output) - The Mute Control pin is active during power-up initialization, mut-
18
ing, power-down or if the master clock to left/right clock frequency ratio is incorrect. During
25
reset, these outputs are set to a high impedance.
20 Differential Right Channel Analog Output (Output) - The full-scale differential analog
19 output level is specified in the Analog Characteristics specification table.
21 Analog Ground (Input) - Ground reference for the analog section.
22 Analog Power (Input) - Positive power for the analog section.
23 Differential Left Channel Analog Output (Output) - The full-scale differential analog out-
24 put level is specified in the Analog Characteristics specification table.
26 Quiescent Voltage (Output) - Filter connection for internal quiescent voltage.
27 Serial Audio Interface Power (Input) - Positive power for serial audio interface I/O.
9
10
Mode Selection (Input) - Determines the operational mode of the device.
11
12
Address Bit 1 (I²C) / Control Data Input (SPI) (Input) - AD1 is a chip address pin in I²C
9
mode; CDIN is the input data line for the Control Port interface in SPI mode.
10 Serial Control Port Clock (Input) - Serial clock for the serial Control Port.
™
Serial Control Data (I²C) / Control Data Output (SPI) (Input/Output) - SDA is a data I/O
11
line in I²C mode. CDOUT is the output data line for the Control Port interface in SPI mode.
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin
12
in I²C mode; CS is the chip select signal for SPI format.
Interpolation
Register/Hardware
Filter with
Configuration
Volume Control
Interpolation
PCM
Filter with
Serial
Volume Control
Interface
DSD Processor
DSD
-Volume control
Interface
-50kHz filter
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
DSD_A
28
VLS
27
VQ
26
AMUTEC
25
AOUTA-
24
AOUTA+
23
VA
22
AGND
21
AOUTB+
20
19 AOUTB-
18 BMUTEC
17 VREF
REF_GND
16
FILT+
15
Pin Description
Direct Stream Digital (DSD)
– Dedicated DSD Input Pins
– On-Chip 50 kHz Filter to Meet Scarlet Book
SACD Recommendations
– Matched PCM and DSD Analog Output
Levels
– Non-Decimating Volume Control with
1/2 dB Step Size and Soft Ramp
– DSD Mute Detection
– Supports Phase-Modulated Inputs
– Optional Direct DSD Path to On-Chip
Switched Capacitor Filter
Control Output for External Muting
– Independent Left and Right Mute Controls
– Supports Auto Detection of Mute Output
Polarity
Typical Applications
– DVD Players
– SACD Players
– A/V Receivers
– Professional Audio Products
3.3 V to 5 V
Multibit
Modulator
∆Σ
Multibit
Modulator
∆Σ
Direct DSD
66
CS4398
CS4398
CS4398
DS568F1
5 V
7
Switched
Left
Capacitor
Differential
DAC and
Output
Filter
Switched
Right
Capacitor
Differential
DAC and
Output
Filter
External
Left and Right
Mute
Mute Controls
Control
Internal Voltage
Reference
JULY '05
DS568F1