Marantz SR7009/U1B Service Manual page 193

PIN
NO. NAME I/O
36 VDDRX –
37 RXIN0
I
38 GNDRX -
39 XTI I
40 XTO O
41 AGND –
42 VCC –
43 FILT O
44 VCOM O
45 AGNDAD –
46 VCCAD
–
47 VINL I
48 VINR I
(1) Schmitt trigger input
(2) Schmitt trigger input
(3) Open-drain configuration in I2C mode
(4) Onboard pull-down resistor (50 kΩ, typical)
(5) CMOS Schmitt trigger input
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PCM9211 BLOCK DIAGRAM
BLOCK DIAGRAM
RXIN 0
RXIN 1
RXIN 2
RXIN 3
RXIN 4/ASCKI 0
RXIN 5/ABCKI 0
RXIN 6/ALRCKI 0
RXIN 7/ADIN0
MPIO_ A0
MPIO_ A1
MPIO_ A2
MPIO_ A3
VINL
VINR
VCOM
MPIO _C0
MPIO _C1
MPIO _C2
MPIO _C3
XTI
XTO
MC /SCL
MDI /SDA
MDO /ADR 0
MS/ADR 1
RST
MODE
Copyright © 2010, Texas Instruments Incorporated
5-V
TOLERANT
– Power supply, 3.3 V (typ.), for RXIN0 and RXIN1.
Biphase signal, input 0, built-in coaxial amplifier
Yes
- Ground, for RXIN
No Oscillation circuit input for crystal resonator or external XTI clock source input(5)
No Oscillation circuit output for crystal resonator
– Ground, for PLL analog
– Power supply, 3.3 V (typ.), for PLL analog
No External PLL loop filter connection terminal; must connect recommended filter
No ADC common voltage output; must connect external decoupling capacitor
– Ground, for ADC analog
Power supply, 5.0 V (typ.), for ADC analog
–
No ADC analog voltage input, left channel
No ADC analog voltage input, right channel
FILT
AUXIN 0
DIR
RXIN0
RXIN1
PLL
RXIN2
RXIN3
Lock :DIR
RXIN4
Unlock:ADC
RXIN5 Clock/ Data
Recovery
RXIN6
RXIN7
RXIN8
Lock Detection
RXIN9
MPIO_ A
RXIN10
SELECTOR
RXIN11 RECOUT 0
DITOUT RECOUT 1
ADC
ADC Mode
ADC
Control
Com. Supply
ADC Standalone
MPIO_ C
SELECTOR
AUXIN1
ADC Clock
(SCK /BCK/LRCK)
Divider
OSC
XMCKO
(To MPIO _A & MPO0/1 )
XMCKO
Divider
REGISTER
Function DIR CS
2
Control ( 48-bit)
SPI/I C
INTERFACE
GPIO/GPO DIT CS
Data ( 48-bit)
POWER SUPPLY
Reset
and Mode ADC DIR
Set
ANALOG ANALOG
VCCAD AGNDAD VCC AGND VDDRX
Product Folder Link(s):
DESCRIPTION
AUTO
RXIN7
DIR
DOUT
ADC
AUXIN0
SCKO/ BCK/LRCK
AUXIN1
AUXIN2
AUTO
DIR
ADC
AUXIN0
AUXIN1
AUXIN2
RECOUT0
RECOUT1
DITOUT
AUTO
DIR
ADC
AUXOUT
AUXIN0
AUXIN 2
AUXIN1
Secondary BCK / LRCK
Divider
Selector
EXTRA DIR FUNCTIONS
DIR DIR
ERROR DETECTION
P and P f Calculator
C D S
Non-PCM DETECTION
f Calculator
S
All Port Flags
DIR Interrupt
f Calculator
S
DTS-CD/LD Detection
Validity Flag
User Data
Channel Status Data
BFRAME Detection
DIR
ALL
ANALOG Interrupt System
GNDRX DVDD DGND
193
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PCM9211
PCM9211
SBAS495 – JUNE 2010
SCKO
BCK
MAIN
OUTPUT
LRCK
PORT
DOUT
DIT
MPO 0
MPO0/1
MPO 1
SELECTOR
MPIO_B0
MPIO_B1
MPIO _B
MPIO_B2
SELECTOR
MPIO_B3
SBCK /SLRCK
( to MPIO_A )
ERROR /INT0
NPCM /INT1
MPIO_ A
MPIO_ B
MPIO_ C
MPO0
MPO1
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