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a.
The card is initialized in the receive mode by the computer reset command.
b.
When bit D7 of the Control Register is set high, direction of the three groups of the
associated PPI chip as well as the mode can be set. For example, a write to Base Address
+3 with data bit D7 high programs port direction at Group 0 ports A, B, and C. If, for
example, hex 80 is sent to Base Address +3, the Port 0 PPI will be configured in mode 0
with Groups A, B, and C as outputs.
At the same time, data bit D7 is also latched in a buffer controller for the associated PPI chip. A
high state disables the buffers and, thus, all four buffers will be put in the tristate mode; i.e.
disabled.
c.
Now, if any of the groups are to be set as outputs, you may set the values to the respective
group with the outputs still in the tristate condition. (If all groups are to be set as inputs,
this step is not necessary.)
d.
If data bit D7 is low when the control byte is written, ONLY the associated buffer
controller is addressed. If, for example, a control byte of hex 80 has been sent as
previously described, and the data to be output are correct, and it is now desired to open
the three groups, then it is necessary to send a control byte of hex 00 to base address +3 to
enable the port 0 buffers. When you do this, the buffers will be enabled.
Note that all data bits except D7 must be the same for the two control bytes
Those buffers will now remain enabled until another control byte with data bit D7 high is sent to
base address +3.
Similarly, the Port 1 groups can be enabled/disabled via the control register at base address +7.
The following program fragment in C language illustrates the foregoing:
const BASE_ADDRESS 0x300;
outportb(BASE_ADDRESS +3, 0x89);
outportb(BASE_ADDRESS,0);
outportb(BASE_ADDRESS+1,0);
outportb(BASE_ADDRESS +3, 0x09);
Manual 00650-529-1
Note
/*This instruction sets the mode to Mode 0,
ports
A and B as output, and port C as input.
Since bit D7 is high, the output buffers are set
to tristate condition. See item b. above.*/
/*These instructions set the initial state of ports
A and B to all zeroes. Port C is not set because
it is
configured as an input.
above.*/
/*Enable the tristate output buffers by using the
same control byte used to configure the PPI, but
now set bit D7 low. See item d. above.*/
See item c.
Page 6-3
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