Chapter 6: Programming; Table 6-1: Address Assignment Table - ICS Advent PCI-DIO48 Series Product Manual

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Chapter 6: Programming

These cards are I/O-mapped devices that are easily configured from any language and any
language can easily perform digital I/O through the card's ports. This is especially true if the form
of the data is byte or word wide. All references to the I/O ports would be in absolute port
addressing. However, a table could be used to convert the byte or word data ports to a logical
reference.
Developing Your Application Software
If you wish to gain a better understanding of the programs on diskette, then the information in the
following paragraphs will be of interest to you. Refer to the data sheets and 8255-5 specification
in Appendix A.
A total of 16 register locations are used by the PCI-DIO48(S)(S). The PPIs are addressed
consecutively with Address bits A3 through A0 as follows:
Base Address
Base Address +1
Base Address +2
Base Address +3
Base Address +4
Base Address +5
Base Address +6
Base Address +7
Base Address +8
Base Address +9
Base Address +B
Base Address +F
These cards use two 8255-5 PPIs to provide a total of 48 bits input/output capability. The cards
are designed to use each of these PPIs in Mode 0 wherein:
a.
There are two 8-bit groups (A and B) and two 4-bit groups (C Hi and C Lo).
b.
Any group can be configured as an input or an output.
c.
Outputs are latched.
d.
Inputs are not latched.
Manual 00650-529-1
Address
PA Group 0
PB Group 0
PC Group 0
Control Group 0
PA Group 1
PB Group 1
PC Group 1
Control Group 1
Enable/DisableBuffer,Grp0
Enable/DisableBuffer,Grp1
Enable Chg-of-St. Interrupt
Clear Chg-of-St. Interrupt

Table 6-1: Address Assignment Table

Port Assignment
Operation
Read/Write
Read/Write
Read Write
Write Only
Read/Write
Read/Write
Read/Write
Write Only
Write Only
Write Only
Write Only
Write Only
Page 6-1

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