Denon DNP-800NE Service Manual page 27

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PCM9211 (MAIN:U502)
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PIN CONFIGURATIONS
48
47
46
ERROR/INT0
1
NPCM/INT1
2
MPIO_A0
3
MPIO_A1
4
MPIO_A2
5
MPIO_A3
6
MPIO_C0
7
MPIO_C1
8
MPIO_C2
9
MPIO_C3
10
MPIO_B0
11
MPIO_B1
12
13
14
15
PIN
5-V
PIN Functions
NO.
NAME
I/O
TOLERANT
1
ERROR/INT0
O
No
DIR Error detection output / Interrupt0 output
PIN
2
NPCM/INT1
O
No
DIR Non-PCM detection output / Interrupt1 output
3
MPIO_A0
I/O
Yes
Multipurpose I/O, Group A
5-V
4
MPIO_A1
I/O
Yes
Multipurpose I/O, Group A
NO.
NAME
I/O
5
MPIO_A2
I/O
Yes
Multipurpose I/O, Group A
TOLERANT
6
MPIO_A3
I/O
Yes
Multipurpose I/O, Group A
7
MPIO_C0
I/O
Yes
Multipurpose I/O, Group C
1
ERROR/INT0
O
No
DIR Error detection output / Interrupt0 output
8
MPIO_C1
I/O
Yes
Multipurpose I/O, Group C
9
MPIO_C2
I/O
Yes
Multipurpose I/O, Group C
2
NPCM/INT1
O
No
DIR Non-PCM detection output / Interrupt1 output
10
MPIO_C3
I/O
Yes
Multipurpose I/O, Group C
11
MPIO_B0
I/O
Yes
Multipurpose I/O, Group B
3
MPIO_A0
I/O
Yes
Multipurpose I/O, Group A(1)
12
MPIO_B1
I/O
Yes
Multipurpose I/O, Group B
13
MPIO_B2
I/O
Yes
Multipurpose I/O, Group B
4
MPIO_A1
I/O
Yes
Multipurpose I/O, Group A(1)
14
MPIO_B3
I/O
Yes
Multipurpose I/O, Group B
15
MPO0
O
No
Multipurpose output 0
5
MPIO_A2
I/O
Yes
Multipurpose I/O, Group A(1)
(1) Schmitt trigger input
6
MPIO_A3
I/O
Yes
Multipurpose I/O, Group A(1)
Copyright © 2010, Texas Instruments Incorporated
7
MPIO_C0
I/O
Yes
Multipurpose I/O, Group C(1)
Product Folder Link(s):
8
MPIO_C1
I/O
Yes
Multipurpose I/O, Group C(1)
9
MPIO_C2
I/O
Yes
Multipurpose I/O, Group C(1)
10
MPIO_C3
I/O
Yes
Multipurpose I/O, Group C(1)
11
MPIO_B0
I/O
Yes
Multipurpose I/O, Group B(1)
12
MPIO_B1
I/O
Yes
Multipurpose I/O, Group B(1)
13
MPIO_B2
I/O
Yes
Multipurpose I/O, Group B(1)
14
MPIO_B3
I/O
Yes
Multipurpose I/O, Group B(1)
15
MPO0
O
No
Multipurpose output 0
16
MPO1
O
No
Multipurpose output 1
17
DOUT
O
No
Main output port, serial digital audio data output
18
LRCK
O
No
Main output port, LR clock output
19
BCK
O
No
Main output port, Bit clock output
20
SCKO
O
No
Main output port, System clock output
21
DGND
Ground, for digital
22
DVDD
Power supply, 3.3 V (typ.), for digital
23
MDO/ADR0
I/O
Yes
Software control I/F, SPI data output / I2C slave address
setting0(2)
24
MDI/SDA
I/O
Yes
Software control I/F, SPI data input / I2C data input/output(2)
(3)
25
MC/SCL
I
Yes
Software control I/F, SPI clock input / I2C clock input(2)
PCM9211
SBAS495 – JUNE 2010
PT PACKAGE
LQFP-48
(TOP VIEW)
45
44
43
42
41
40
39
38
37
36
VDDRX
RXIN1
35
34
RST
33
RXIN2
RXIN3
32
31
RXIN4/ASCKIO
PCM9211
30
RXIN5/ABCKIO
RXIN6/ALRCKIO
29
28
RXIN7/ADIN0
27
MODE
26
MS/ADR1
MC/SCL
25
16
17
18
19
20
21
22
23
24
PIN FUNCTIONS
DESCRIPTION
(1)
DESCRIPTION
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Submit Documentation Feedback
7
PCM9211
PIN
5-V
NO.
NAME
I/O
TOLERANT
26
MS/ADR1
I
Yes
27
MODE
I
No
28
RXIN7/ADIN0
I
Yes
29
RXIN6/ALRCKI0
I
Yes
30
RXIN5/ABCKI0
I
Yes
31
RXIN4/ASCKI0
I
Yes
32
RXIN3
I
Yes
33
RXIN2
I
Yes
34
RST
I
Yes
35
RXIN1
I
Yes
36
VDDRX
37
RXIN0
I
Yes
38
GNDRX
-
-
39
XTI
I
No
40
XTO
O
No
41
AGND
42
VCC
43
FILT
O
No
44
VCOM
O
No
45
AGNDAD
46
VCCAD
47
VINL
I
No
48
VINR
I
No
(1) Schmitt trigger input
(2) Schmitt trigger input
(3) Open-drain configuration in I2C mode
(4) Onboard pull-down resistor (50 k Ω , typical)
(5) CMOS Schmitt trigger input
27
DESCRIPTION
Software control I/F, SPI chip select / I2C slave address
setting1(2)
Control mode setting, (see the Serial Control Mode section,
Control Mode Pin Setting)
Biphase signal, input 7 / AUXIN0, serial audio data input(2)
Biphase signal, input 6 / AUXIN0, LR clock input(2)
Biphase signal, input 5 / AUXIN0, bit clock input(2)
Biphase signal, input 4 / AUXIN0, system clock input(2)
Biphase signal, input 3(2)
Biphase signal, input 2(2)
Reset Input, active low(2) (4)
Biphase signal, input 1, built-in coaxial amplifier
Power supply, 3.3 V (typ.), for RXIN0 and RXIN1.
Biphase signal, input 0, built-in coaxial amplifier
Ground, for RXIN
Oscillation circuit input for crystal resonator or external XTI
clock source input(5)
Oscillation circuit output for crystal resonator
Ground, for PLL analog
Power supply, 3.3 V (typ.), for PLL analog
External PLL loop filter connection terminal; must connect
recommended filter
ADC common voltage output; must connect external
decoupling capacitor
Ground, for ADC analog
Power supply, 5.0 V (typ.), for ADC analog
ADC analog voltage input, left channel
ADC analog voltage input, right channel

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