Quectel QuecOpen BG952A-GL Hardware Design page 24

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ADC1
2
ADC0
24
Other Interfaces
Pin Name
Pin No.
W_DISABLE
18
#
AP_READY*
19
Antenna Interfaces
Pin Name
Pin No.
ANT_MAIN
60
ANT_GNSS
49
External GNSS LNA Interface
Pin Name
Pin No.
GNSS_LNA_
51
EN
VDD_RF
99
The LNA is integrated inside the module. It is not recommended to use an external LNA. It is strongly recommended to
3
keep GNSS_LNA_EN (pin 51) and VDD_RF (pin 99) unconnected.
BG952A-GL_QuecOpen_Hardware_Design
General-purpose
AI
ADC interface
General-purpose
AI
ADC interface
I/O
Description
Airplane mode
DI
control
Application
DI
processor ready
I/O
Description
Main antenna
AIO
interface
GNSS antenna
AI
interface
3
I/O
Description
External GNSS
DO
LNA enable
Can be used for
PO
external GNSS
Voltage range:
0.1–1.8 V
Voltage range:
0.1–1.8 V
DC Characteristics
V
min = -0.2 V
IL
V
max = 0.54 V
IL
V
min = 1.26 V
IH
V
max = 2.0 V
IH
DC Characteristics
-
-
DC Characteristics
V
max = 0.38 V
OL
V
min = 1.36 V
OH
Vnom = 1.9 V
I
max = 50 mA
O
LPWA Module Series
If unused, keep
these pins open.
Can be configured
as GPIOs.
Comment
1.8 V power
domain.
Pulled up by
default.
When this pin is at
low level, the
module enters
airplane mode.
If this pin is unused,
keep it open.
Can be configured
as GPIOs.
1.8 V power
domain.
If this pin is unused,
keep it open.
Can be configured
as GPIOs.
Comment
50 Ω impedance.
50 Ω impedance.
If unused, keep this
pin unconnected.
Comment
1.8 V power
domain.
If unused, keep this
pin open.
If unused, keep this
pin open.
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