Introduction; Getting Started; Pc/104 Bus Interface - Technologic Systems TS-NVRAM2 Manual

1.

Introduction

The TS-NVRAM2 is a PC/104 expansion card that adds up to 2 MB of nonvolatile high-
speed battery-backed RAM. It can be arranged as 8 bit or 16 bit wide memory and can
be configured as paged memory or linear memory. The TS-NVRAM2 eliminates any
wear-out failure and write cycle latency inherent in all Flash devices
This product uses a multi-layer PCB with power and ground planes to minimize noise
and EMI issues. The TS-NVRAM2 only requires a single 5V power supply.
2.

Getting Started

X86 Architecture
Install only jumpers 3 and 4 on the TS-NVRAM2, this will put the board in 8-bit mode and
set the base address for all registers in the I/O space at 0x140. After a system reset,
only the eight I/O registers will appear on the PC/104 bus (no memory range will be
decoded) -- this will avoid any conflicts with any other devices. Next write out 0x46 to
I/O location 0x145 (Mode Register). This will configure the TS-NVRAM2 to use paged
memory and will make it appear in memory space at 0xD0000 to 0xD7FFF (a 32 KB
window). This memory range is suggested, since this range is typically free in most x86
platforms, but any 32KB range from 0xA0000 thru 0xDFFFF can be selected (see Mode
register details). Now the NVRAM memory can be accessed at the memory addresses
0xD0000 to 0xD7FFF. Any one of the 64 pages can be selected by writing to the page
register at I/O location 0x144. Since each page is 32 KB and there are 64 pages this
allows access to all 2MB of NVRAM. Up to four TS-NVRAM boards can be installed to
get up to 8MB of non-volatile memory.
TS-ARM Architecture
Ensure no jumpers are installed on the TS-NVRAM2 board. This will put the board in 16-
bit mode and will set the base address for all registers accesses in the I/O space to
0x11E0_0140. After system reset, only the eight I/O registers will appear on the PC/104
bus (no memory range will be decoded) -- this will avoid any conflicts with any other
devices. Next write out 0x80 to 0x11E0_0145 (Mode Register). This will configure the
TS_NVRAM2 to use linear memory and will make it appear in the memory space at
0x2A80_0000 to 0x2A9F_FFFF (a 2MB range). Two TS-NVRAM2 boards could be
used in a system to get 4MB of linear non-volatile memory.
3.

PC/104 Bus Interface

The TS-NVRAM2 features a single 64-pin PC/104 connector that allows standard 8-bit
data bus access. This is used to support the standard 8-bit mode for any PC/104
system. It is possible to access the TS-NVRAM2 board in full 16-bit mode if using a TS-
72xx product. These Technologic System ARM-based SBC products can do full 16-bit
data accesses using only the 64-pin connector.
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