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Related Manuals for Technologic Systems TS-NVRAM2
Summary of Contents for Technologic Systems TS-NVRAM2
- Page 1 TS-NVRAM2 Manual...
- Page 2 16610 East Laser Drive, Suite 10 Fountain Hills, AZ 85268 480-837-5200 FAX 837-5300 info@embeddedx86.com http://www.embeddedx86.com/ This revision of the manual is dated September 16, 2005 All modifications from previous versions are listed in the appendix. Copyright © 1998-2003 by Technologic Systems, Inc. All rights reserved.
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Page 3: Limited Warranty
Limited Warranty Technologic Systems warrants this product to be free of defects in material and workmanship for a period of one year from date of purchase. During this warranty period Technologic Systems will repair or replace the defective unit in accordance with the following instructions: •... -
Page 4: Table Of Contents
Table of Contents Limited Warranty ............................3 Introduction ............................5 Getting Started............................ 5 PC/104 Bus Interface.......................... 5 Maxim DS1321 Controller ......................... 6 Registers ............................. 6 Jumpers............................. 10 Current Drain............................ 10 Temperature Range .......................... 11 Appendix A Manual Revisions........................12... -
Page 5: Introduction
Getting Started X86 Architecture Install only jumpers 3 and 4 on the TS-NVRAM2, this will put the board in 8-bit mode and set the base address for all registers in the I/O space at 0x140. After a system reset, only the eight I/O registers will appear on the PC/104 bus (no memory range will be decoded) -- this will avoid any conflicts with any other devices. -
Page 6: Maxim Ds1321 Controller
(CR2450 coin cell), this results in a typical 15-30 year life span. But if the unit is operated at high temperatures for its entire life, this will lower the battery life. For example, if the TS-NVRAM2 board is operated at 70 degrees Celsius continuously, the lithium battery is likely to fail after 3-4 years. - Page 7 ID #2 ID_2 Address: Base + 1 (Read Only) Definition: This register allows one to determine the board ID. Bit Description: ID_2: Identification byte is hard coded to 0xD9. PLD Version Address: Base + 2 (Read Only) Definition: This register allows one to determine the revision of the PLD. Bit Description: REV: The revision number of the PLD.
- Page 8 Page Register RSVD RSVD PAGE_SELECT Address: Base + 4 (Read/Write) Definition: This register allows one to select the current page when in paged mode. At reset PAGE_SELECT is set to 0x00. Bit Description: PAGE_SELECT: When in paged mode this register allows one to select one of 64 pages for NVRAM access (each page is 32 KB).
- Page 9 Note: TS-ARM platforms only MEM_SELECT Base address 0x1180_0000 0x1181_0000 0x1182_0000 0x1183_0000 0x11B0_0000 0x11B1_0000 0x11B2_0000 0x11B3_0000 If the DECODE bit is clear, base addresses are as follows. Note: 8-bit mode only MEM_SELECT Base address 0xA0000 0xA8000 0xB0000 0xB8000 0xC0000 0xC8000 0xD0000 0xD8000 When in linear mode MEM_SELECT bit 0 determines the base address.
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Page 10: Jumpers
Invalid Current Drain The TS-NVRAM2 uses approximately 50 mA of current from the PC/104 bus 5V supply. When the PC/104 5V is not present, the RAM chips are powered by the lithium battery (CR2450). Approximately 2-4 uA of backup current is required to power the RAM chips in this mode. -
Page 11: Temperature Range
Temperature Range The TS-NVRAM2 is available in both standard temperature (-20 to +70 degrees Celsius) and in extended temperature range of –40 to +85 degrees Celsius. -
Page 12: Appendix A Manual Revisions
Appendix A Manual Revisions Date Revision Number Revision September 09, 2005 Preliminary release September 16, 2005 Initial release...