Hp vectra ve 5/xx series 2 pc - service handbook (8 pages)
Summary of Contents for HP Vectra VE5 4
Page 1
Technical Reference Manual Hardware and BIOS HP Vectra VE 5/xxx Series 4 PC...
Page 2
Adobe Systems Incorporated which may be registered in certain jurisdictions. Microsoft®, Windows® and MS-DOS® are U.S. registered trademarks of Microsoft Corporation. Pentium® is a U.S. registered trademark of Intel Corporation. Hewlett-Packard France Commercial Desktop Computing Division 38053 Grenoble Cedex 9 France 1997 Hewlett-Packard Company...
Preface This manual is a technical reference and BIOS document for engineers and technicians providing system level support. It is assumed that the reader possesses a detailed understanding of AT-compatible microprocessor functions and digital addressing techniques. Technical information that is readily available from other sources, such as manufacturer’s proprietary publications, has not been reproduced.
HP Vectra VE 5/xxx Series 4 User’s Guide (D5570-90001). HP Vectra VE 5/xxx Series 4 Familiarization Guide (D5570-90901). HP Vectra VE 5/xxx Series 4 Online User’s Guide (online). HP Network Administrator’s Guide (online). HP Vectra Accessories Service Handbook - 7th edition (5965-4074).
System Overview This manual describes the HP Vectra VE 5/xxx Series 4 PC, and provides detailed system specifications. This chapter introduces the external features, and summarizes the documentation which is available.
1 System Overview Package Package Front view Front view with cover removed Main memory Processor Rear view Security lock hole (All icons shown here are for information, and do not necessarily appear on the PC). Retaining brackets Parallel Serial Display Keyboard activity light status light...
Documentation The table below summarizes the availability of documentation that is appropriate to the HP Vectra VE 5/xxx Series 4 PC. Most are available as viewable files (which can also be printed) from the HP division support servers, and on the HP Support Assistant CD-ROM.
Where to Find the Information The following table summarizes the availability of information within the HP Vectra VE 5/xxx Series 4 PC documentation set. The user is supplied with the online documentation preloaded on the PC, and the User’s Guide (in paper form).
Page 15
System Board The next chapter describes the graphics, disk and network devices which are supplied with the computer. This chapter describes the components of the system board, taking in turn the components of the Processor-Local Bus, the Peripheral Component Interconnect (PCI) bus and the Industry Standard Architecture (ISA) bus.
2 System Board System Board System Board Voltage Regulator Status Panel Connector L2 cache PCI wake-up connector SiS 5581 PL/PCI bridge, PCI/ISA bridge, DRAM controller, IDE+USB cntlr NS87317 Super I/O controller Graphics Controller Chip System ROM Parallel Port Serial Port System Board Switches Ext.
Architectural View SiS5581 PL/PCI bridge PCI/ISA bridge PL bus interface Level-2 Cache cache controller Memory controller Main memory Data path PCI bus interface 2 USB controller Hard 2 IDE controller disk controller Serial Interrupt EEPROM controller ISA bus interface Pentium processor Graphics controller...
2 System Board Chip-Set Chip-Set The chip-set comprises two chips. These interface between the three main buses (the Processor-Local bus, the PCI bus and the ISA bus). • The Bridge chip (SiS5581) is a combined PL/PCI bridge and cache controller and main memory controller and PCI/ISA bridge and IDE controller and USB controller.
Page 19
The Level-2 cache memory controller supports write back direct mapped Controller pipelined burst static RAM. On the HP Vectra VE 5/xxx Series 4 PC, 256KB of write back cache memory is implemented as two 32K soldered on the system board. The 8-bit tag allows the lowermost 64 MB of...
2 System Board Chip-Set IDE Controller The PCI master/slave IDE controller, supporting four devices, two on each of two channels, is described on page 26. As well as the traditional five PIO modes (0 to 4) and three DMA modes (0 to 2), this controller also supports three Ultra ATA/33, or Ultra DMA, modes (0 to 2), allowing peak transfer rates up to 33 MB per second.
Page 21
Bidirectional mode (PC/XT, PC/AT, and PS/2 compatible). Enhanced mode (enhanced parallel port, EPP, compatible). High speed mode (MS/HP extended capabilities port, ECP, compatible). The integrated flexible drive controller (FDC) supports any combination of two from the following: tape drives, 3.5-inch flexible disk drives, 5.25-inch flexible disk drives.
Page 22
2 System Board Chip-Set Serial EEPROM This is the non-volatile memory which holds the values for the Setup program (they are no longer stored in the CMOS memory). ACPI Support The Advanced Configuration and Power Interface (ACPI) provides a system-wide approach to system and device power management that allows the PC to be turned off, and yet remain sufficiently active to respond immediately to user and network requests.
Page 23
Description Flash program enable (FLASHLOCK) Backplane ID0 (always 1) Backplane ID1 (always 1) Bus core frequency BCF0 (connected to SW-3, open=1, closed=0) Bus core frequency BCF1 (connected to SW-4, open=1, closed=0) Host bus request detect (60/66 MHz) (connected to SW-1, always 0) Serial EEPROM data FDD write protect (not used) Password enable (connected to SW-7, open=1, closed=0)
8 KB. The L2 cache memory is controlled by the Bridge chip in the system board chip-set. On the HP Vectra VE 5/xxx Series 4 PC, 256 KB of direct mapped, write-back, synchronous pipelined burst, 8.5 ns static random access memory (SRAM) is integrated on the system board.
2 System Board Devices on the PCI Bus Devices on the PCI Bus PCI Device PL/PCI bridge PCI/ISA bridge IDE controller USB controller Integrated graphics controller PCI slot #1 PCI slot #2 PCI slot #3 PCI slot #4 The distribution of the interrupt lines is described more fully on page 62. Integrated Drive Electronics (IDE) The IDE controller is implemented as part of the Bridge chip.
Page 27
Mode Cycle time (ns) Transfer rate (MB/s) The three DMA modes (for single or double word) allow the following transfer rates: Mode Cycle time (ns) Transfer rate (MB/s) The three Ultra ATA/33 modes (also know as Ultra DMA modes) allow the following peak transfer rates: Mode Cycle time (ns)
• Supports daisy-chaining through a tiered-star, multi-drop topology (up to 6 tiers) USB works only if the USB interface has been enabled within the HP Setup program. Currently, only the Microsoft Windows 95 SR 2.1 operating system provides support for the USB. This operating system is preloaded on the...
Devices on the ISA Bus ISA Device Index Super I/O X Ben (HP ASIC) 496h Super I/O Controller The Super I/O chip (NS87317) is part of the chip set, and is described on page 20. The computer is supplied with a Logitech 2-button mouse, and a keyboard...
Page 30
Chapters 4 and 5. Updating the System ROM The System ROM can be updated with the latest BIOS. This can be downloaded, as a compressed file, from the HP Electronic Services ). You must specify the model of the computer http://www.hp.com/go/vectrasupport since the utility which is supplied for a different model cannot be used with this one.
Page 31
The second method is to copy the above files to a system diskette, to re-boot the PC from the flexible disk drive, and to run the Do not switch off the computer until the system BIOS update procedure has completed, successfully or not. To do so could cause irrecoverable damage to the ROM, thereby requiring the replacement of the system board.
Page 32
2 System Board Devices on the ISA Bus By setting switch SW8 in the Closed data cleared (in the CMOS memory and the Serial EEPROM), but also all the Plug-and-Play data that had been saved in the Serial EEPROM. However, the serial number, the tattooing string, the date and the time are each retained.
Interface Devices and Mass-Storage Drives This chapter describes the graphics, mass storage and network devices which are supplied with the computer. It also summarizes the pin connec- tions on the internal and external connectors.
3 Interface Devices and Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip S3 Trio 64V2 Graphics Controller Chip All models are supplied with a graphics controller chip integrated on the system board. This 64-bit PCI Ultra VGA graphics controller can be characterized as follows: ®...
Page 35
Standard VGA Modes Interface Mode No. Standard Resolution Type text 40 x 25 chars 00h* text 40 x 25 chars 00h+ text 40 x 25 chars text 40 x 25 chars 01h* text 40 x 25 chars 01h+ text 40 x 25 chars text 80 x 25 chars 02h*...
3 Interface Devices and Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip Available Video Resolutions The following table lists the available video resolutions using these drivers. The available resolutions may be different with later versions of each of these drivers. Resolution Windows NT 640 x 480...
3 Interface Devices and Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip Connectors The layout of the pins for the DB15 VGA socket is depicted on page 46. The Video Electronics Standards Association (VESA) defines a standard video connector, variously known as the VESA feature connector, auxiliary connector, or pass-through connector.
3 Interface Devices and Mass-Storage Drives Audio Controller Audio Controller The Aztech audio interface, supplied on some models in an ISA slot, is SoundBlaster Pro compatible and can be characterized as follows: • line-out (stereo) jack: 20 Hz to 20 kHz frequency response, 83 dB signal to noise ratio, 0.2% total harmonic distortion •...
The IDE controller is described on page 26. The flexible disk controller is described on page 21. Hard Disk Drives A 3.5-inch hard disk drive is supplied on an internal shelf in some models. HP product number Manufacturer Flexible Disk Drives A 3.5-inch, 1.44 MB bezelless flexible disk drive (D2035-63172) is mounted vertically on the right hand side of the front panel.
3 Interface Devices and Mass-Storage Drives Connectors and Sockets Connectors and Sockets IDE Hard Disk Drive Data Connector Signal Signal Reset# Ground HD10 HD11 HD12 HD13 HD14 HD15 Ground orientation key DMARQ Ground DIOW# Ground DIOR# Ground IORDY SPSYNC:CSEL DMACK# Ground INTRQ IOCS16#...
Page 43
Audio Board Connectors Telephone Answering Device Connector 1 Analog ground 3 Line-in 5 Line-out (left) 7 Line-out (right) 9 Analog ground Aux-In Connector 1 Left channel 2 Ground 3 Ground 4 Right channel Int. Speaker Connector 1 Power signal out 2 Analog ground Signal Signal...
Page 44
3 Interface Devices and Mass-Storage Drives Connectors and Sockets Signal Signal -12 V TRST# +12 V Ground +5 V +5 V +5 V INTA# INTB# INTC# INTD# +5 V Ground reserved reserved PRSNT# +3.3 V reserved orientation key orientation key reserved reserved Ground...
Page 45
16-bit ISA Connector (8-bit ISA uses the A and B connectors) Signal Signal Ground CHCHK# RESDRV +5 V IRQ9 -5 V DRQ2 -12 V NOWS# + 12 V Ground CHRDY SMWTC# AENx SMRDC# SA19 IOWC# SA18 IORC# SA17 DEK3# SA16 DRQ3 SA15 DAK1#...
3 Interface Devices and Mass-Storage Drives Connectors and Sockets Power Supply Connector for System Board PwrGood orientation key Remote_On Ground Ground Ground +12 V supply VBATT orientation key Socket Pin Layouts RJ-45 UTP Connector Keyboard and Mouse Connector Serial Port Connector Signal Signal +5 Vstdby...
Summary of the HP/Phoenix BIOS The Setup program and HP/Phoenix BIOS are summarized in this chapter. The POST routines are described in the next chapter.
4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS Summary HP/Phoenix BIOS Summary The System ROM contains the POST (power-on self-test) routines, and the BIOS: the System BIOS, video BIOS, network BIOS, and low option ROM. This chapter, and the following one, give an overview of the following aspects: •...
Page 49
: N o t I n s t a l l e d <F1> to continue, <F2> to run Setup, <F10> to power off, <F5> to retain 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS Summary P C S e r i a l N um b e r...
4 Summary of the HP/Phoenix BIOS Setup Program Setup Program To run the Setup program, interrupt the POST by pressing when the initial “Vectra” logo screen is being displayed, just after restarting the PC. The band along the top of the screen offers five menus: Main, Advanced, Security, Power, and Exit.
4 Summary of the HP/Phoenix BIOS Setup Program Security Menu Sub-menus are presented for changing the characteristics and values of the User Password, the System Administrator Password, the amount of protection against use of the system’s drives and network connections (using the Hardware Protection sub-menu), and the amount of protection against being able to boot from the system’s drives and network connections...
300 attributes of the PC (both the local PC, and remote ones over the network). HP Lock HP Lock provides a convenient and dynamic access to the security features of the PC. Facilities are provided for: • Passwords •...
If the user attempts to turn the PC off at the status panel, the PC logic will delay the shutting down of the power supply until it is safe to do so. HP Off protects the user from some types of unintentional data loss, providing a safe shutdown of running applications and unsaved files.
16 times and encoded in a valid network packet. Any Magic Packet-compatible management application (such as HP Open- View Workgroup Node Manager) can send a Magic Packet frame. An administrator can do this manually, or can incorporate it into a management script.
Since the user is not physically present, the level of security must be tighter. There is a distinction between the user-boot process, and the RPO-boot process. HP provides all the necessary Setup options to keep users from interfering with the computer during the remote session.
Page 56
4 Summary of the HP/Phoenix BIOS Power Saving and Ergonometry...
Page 57
4 Summary of the HP/Phoenix BIOS Power Saving and Ergonometry The following diagram gives a more accurate, more detailed account of the valid state changes. If the computer ‘hangs’, the power button on the status panel should be held ‘pressed’ for about 6 seconds. A watch-dog timer will detect that the BIOS is inactive, and not reloading the timer once every 6 seconds, thereby forcing the computer to turn itself off without further BIOS acknowledgment.
4 Summary of the HP/Phoenix BIOS BIOS Addresses BIOS Addresses This section provides a summary of the main features of the HP system BIOS. This is software that provides an interface between the computer hardware and the operating system. System Memory Map Any reserved memory that is used by accessory boards must be located in the area from C8000h to EFFFFh.
HP I/O Port Map (I/O Addresses Used by the System Peripheral devices, accessory devices and system controllers are accessed via the system I/O space, which is not located in system memory space. The 64 KB of addressable I/O space comprises 8-bit and 16-bit registers (called I/O ports) located in the various system components.
4 Summary of the HP/Phoenix BIOS BIOS Addresses I/O Address Ports Function 0278h - 027Fh Parallel port 2 0279h IO read data port for ISA Plug and Play enumerator 02E8h - 02EFh Serial port 4 (available if not used) 02F8h - 02FFh...
Page 61
IRQ (Interrupt Vector) IRQ0(08h) IRQ1(09h) IRQ2(0Ah) Slave IRQ IRQ8(70h) IRQ9(71h) 4 Summary of the HP/Phoenix BIOS Function Function Interrupt Request Description System timer Keyboard controller Cascade connection from INTC2 (Interrupt Controller 2) Real Time Clock...
Page 62
4 Summary of the HP/Phoenix BIOS BIOS Addresses IRQ10(72h) IRQ11(73h) IRQ12(74h) IRQ13(75h) IRQ14(76h) IRQ15(77h) IRQ3(0Bh) IRQ4(0Ch) IRQ5(0Dh) IRQ6(0Eh) IRQ7(0Fh) Using the Setup program: • IRQ4 can be made available by disabling serial ports 1 and 3. • IRQ5 can be made available by disabling the parallel port 2.
Page 63
Reserved: read as 000 IRQx# Routing Bits: these bits specify which IRQ signal to generate. Possible values are: 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, 15. 4 Summary of the HP/Phoenix BIOS BIOS Addresses Slot 4 A B C D...
Page 64
4 Summary of the HP/Phoenix BIOS BIOS Addresses...
Power-On Self-Test and Error Messages This chapter describes the Power-On Self-Test (POST) routines, which are contained in the System BIOS, the error messages that can result, and the suggestions for corrective action.
5 Power-On Self-Test and Error Messages Order in Which the Tests are Performed Order in Which the Tests are Performed Each time the system is powered on, or a reset is performed, the POST is executed. The POST process verifies the basic functionality of the system components and initializes certain system parameters.
Page 67
Tests the system ROM BIOS and shadows it. Failure to shadow the ROM BIOS will cause an error code to display. The boot process will continue, but Shadow the System ROM BIOS the system will execute from ROM. This test is not performed after a soft reset (using Checks the serial EEPROM and returns an error code if it has been Load CMOS Memory...
Page 68
5 Power-On Self-Test and Error Messages Order in Which the Tests are Performed Tests protected RAM in 64 KB segments above 1 MB. (This test is not done Protected Mode RAM Test during a reset using (Extended RAM) error code to display. Keyboard / Mouse Tests Invokes a built-in keyboard self-test of the keyboard’s microprocessor and Keyboard Test...
Error Message Summary The POST section of the HP BIOS no longer displays numeric error codes (such as 910B) but gives a self-explanatory, descriptive diagnosis, and a list of suggestions for corrective action. The following table summarizes the most significant of the problems that can be reported.
5 Power-On Self-Test and Error Messages Beep Codes Beep Codes If a terminal error occurs during POST, the system issues a beep code before attempting to display the error. Beep codes are useful for identifying the error when the system is unable to display the error message. Beep Numeric Beep Pattern...