I/O Map And Register Accessing; System I/O Map - Compaq Deskpro EP 6233 Technical Reference Manual

Chapter 4 System Support
4.7

I/O MAP AND REGISTER ACCESSING

4.7.1

SYSTEM I/O MAP

Table 4–19. System I/O Map
I/O Port
0000..000Fh
0020..0021h
0040..0043h
0060h
0061h
0064h
0070h
0071h
0072h, 0073h
0080..008Fh
0092h
00A0..00A1h
00B2h, 00B3h
00C0..00DFh
00E8, 00E9h
00F0h
015C, 015Dh
0170..0177h
01F0..01FFh
0201..024Fh
0278..027Bh
02F8..02FFh
0300-030Fh
0371.. 0375h
0376h
0377h
0378..037Fh
0388..038Bh
03B0..03DFh
03E8..03EFh
03F0..03F5h
03F6, 03F7h
03F8..03FFh
04D0, 04D1h
0C00, 0C01h
0C06, 0C07h
0C7Ch
0C80, 0C81h
0C82h
0C83h
0CD6h, 0CD7h
0CF8h
0CF9h
0CFCh
FF00..FF07h
NOTE: Assume unmarked gaps are reserved/unused.
4-46 Compaq Deskpro EP Series of Personal Computers
Table 4-19.
System I/O Map
Function
DMA Controller 1
Interrupt Controller 1
Timer 1
Keyboard Controller Data Byte
NMI, Speaker Control
Keyboard Controller Command/Status Byte
NMI Enable, RTC/Lower CMOS Index
RTC/Lower CMOS Data
Upper CMOS Index/Data
DMA Page Registers
Port A, Fast A20/Reset
Interrupt Controller 2
APM Control/Status Ports
DMA Controller 2
GPIO Ports 1 and 2 (87309)
Math Coprocessor Busy Clear
87309 I/O Controller Configuration Registers (Index, Data)
Hard Drive (IDE) Controller 2
Hard Drive (IDE) Controller 1
Audio subsystem control (primary & secondary addresses)
Parallel Port (LPT2)
Serial Port (COM2)
Network interface controller
Diskette Drive Controller Alternate Addresses
IDE Controller Alternate Address
IDE Controller Alternate Address, Diskette Drive Controller Alternate Address
Parallel Port (LPT1)
FM synthesizer (alias addresses)
Graphics Controller
Serial Port (COM3)
Diskette Drive Controller Primary Addresses
Diskette Drive Controller Primary Addresses, Hard Drive Controller Primary Addresses
Serial Port (COM1)
Master, Slave Edge/Level INTR Control Register
PCI IRQ Mapping Index, Data
Reserved - Compaq proprietary use only
Machine ID
Scan Chain High/Low Bytes
Auto Rev Data
Machine ID
Power Management Registers
PCI Configuration Address (dword access)
Reset Control Register
PCI Configuration Data (byte, word, or dword access)
IDE Bus Master Register
First Edition - April 1998