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4.4 Chipset Features Setup
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds
and the access to the system memory resources, such as DRAM and
the external cache. It also coordinates the communications between
the conventional ISA and PCI buses. It must be stated that these
items should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that
the data has been lost while using your system.
Auto Configuration
L2 (WB) Tag Bit Length
SDRAM RAS-to-CAS Delay
NA# Enable
Starting Point of Paging
Refresh Cycle Time (us)
RAS Pulse Width Refresh
RAS Precharge Time
RAS to CAS Delay
CAS# Pulse Width (FP)
CAS# Pulse Width (EDO)
RAMW# Assertion Timing
CAS Precharge Time (FP)
CAS Precharge Time (EDO)
SDRAM Wait State Control
Enhanced Memory Write
Read Prefetch Memory RD
CPU to PCI Post Write
32
ROM PCI/ISA BIOS (xxxxxxxx)
BIOS FEATURES SETUP
AWARD SOFTWARE, INC.
:
Enabled
:
8bits
System BIOS Cacheable
:
Enabled
Video BIOS Cacheable
:
Enabled
Memory Hole at 15M-16M
:
1T
VGA Shared Memory Size
:
187.2
VGA Memory Clock (MHz)
:
6T
:
4T
:
4T
:
2T
:
1T
:
3T
:
1T/2T
:
1T/2T
:
1WS
:
Disabled
:
Enabled
:
3T
CPU to PCI Burst Mem. WR : Disabled
ISA Bus Clock Frequency
????: Select Item
ESC : Quit
F1
: Help
PU/PD/+/-: Modify
F5
: Old Values
(Shift) F2 : Color
F6
: Load BIOS Defaults
F7
: Load Setup Defaults
: PCICLK/4
: Enabled
: Enabled
: Disabled
: 1MB
: 55
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