Philips 5008 Series Service Manual page 39

Chassis q552.5he la
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Pinning information
Ball
Symbol
[2]
F26
CA_WAITN
G1
M0_BA2
G2
VSS
G3
M0_A5
G4
M0_A3
G5
M0_DQ13
G6
VDD_1V8
G7
VDD_1V8
G8
VSS
G9
VDD_1V15
G10
VSS
G11
VDD_1V15
G12
VSS
G13
VDD_1V15
G14
VSS
G15
VDD_1V15
G16
VSS
G17
VDD_1V15
G18
VSS
G19
VDD_1V15
G20
VSS
G21
CA_A8
G22
CA_A9
G23
CA_A10
G24
CA_A11
G25
CA_A12
G26
CA_A13
H1
M0_BA0
H2
M0_BA1
H3
M0_WEB
H4
VSS
H5
M0_A7
H6
VSS
H7
VSS
H20
VDD_1V15
H21
CA_A2
H22
CA_A3
H23
CA_A4
H24
CA_A5
IC Data Sheets
PNX58XXX [5/16]
Pad
Pad type
direc-
tion
I/O
CMOS 3.3 V
O
DDR2 addr
PWR ground
O
DDR2 addr
O
DDR2 addr
I/O
DDR2 data
PWR supply
PWR supply
PWR ground
PWR supply
PWR ground
PWR supply
PWR ground
PWR supply
PWR ground
PWR supply
PWR ground
PWR supply
PWR ground
PWR supply
PWR ground
O
CMOS 3.3 V
O
CMOS 3.3 V
O
CMOS 3.3 V
O
CMOS 3.3 V
O
CMOS 3.3 V
O
CMOS 3.3 V
O
DDR2 addr
O
DDR2 addr
O
DDR2 addr
PWR ground
O
DDR2 addr
PWR ground
PWR ground
PWR supply
O
CMOS 3.3 V
O
CMOS 3.3 V
O
CMOS 3.3 V
O
CMOS 3.3 V
Figure 8-7 Pin configuration
back to
div. table
Q552.5HE LA
Description
CA Extend Bus Cycle (Input)
Memory Bank Select bit 2
Memory Address bit 5
Memory Address bit 3
Memory Data bit 13
CA Addr Bus Bit-8 (Output)
CA Addr Bus Bit-9 (Output)
CA Addr Bus Bit-10 (Output)
CA Addr Bus Bit-11 (Output)
CA Addr Bus Bit-12 (Output)
CA Addr Bus Bit-13 (Output)
Memory Bank Select bit 0
Memory Bank Select bit 1
Memory Write Enable
Memory Address bit 7
CA Addr Bus Bit-2 (Output)
CA Addr Bus Bit-3 (Output)
CA Addr Bus Bit-4 (Output)
CA Addr Bus Bit-5 (Output)
8.
EN 39
19490_306_130413.eps
130413
2013-Sep-20

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