Table of Contents
Advertisement
Before InitMCT
Before OtherTiming
Before UMAMemTyping
Before SetDqsEccTmgs
Before MemClr
Before On DIMM Thermal
Before DMI
End of memory code
Entry point S3Init
Sending MRS2
Sedding MRS3
Sending MRS1
Sending MRS0
Continuous Pattern Read
Continuous Pattern Write
Mem: 2d RdDqs Training begin
Mem: Before optional callout to platform BIOS to change External Vref
during 2d Training
Mem: After optional callout to platform BIOS to change External Vref during
2d Training
Configure DCT For General use begin
Configure DCT For training begin
Configure DCT For Non-Explicit
Configure to Sync channels
Allocate C6 Storage
Before LV DDR4
// BR CPU
BR before AP launch
Install AP launched PPI
BR after AP launch
Before CPU PM
Enable IO Cstate
Enable C6
Install CCX PEI complete PPI
BR CPU memory done call back entry
Before APM weights
After APM weights
BR CPU memory done call back end
BR Init Mid entry
BR enable APM
BR Init Mid install protocol
BIOS Setup
- 152 -
0xA149
0xA14A
0xA14B
0xA14C
0xA14D
0xA14E
0xA14F
0xA150
0xA151
0xA180
0xA181
0xA182
0xA183
0xA184
0xA185
0xA186
0xA187
0xA188
0xA189
0xA18A
0xA18B
0xA18C
0xA18D
0xA18E
0xA190
0xA191
0xA192
0xA193
0xA194
0xA195
0xA196
0xA197
0xA198
0xA199
0xA19A
0xA19B
0xA19C
0xA19D
Advertisement
Table of Contents
