Advanced Chipset Setup - BOSER Technology HS-6238 Manual

Industrial single board computer
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4.6

Advanced Chipset Setup

This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
AMIBIOS SETUP – ADVANCED CHIPSET SETUP
(C)2001 American Megatrends, Inc. All Rights Reserved
CPU Ratio Selection
CPU BIST Enable
ICH Delayed Transaction
DMA Collection Buffer Enable
DRAM Page Closing Policy
Memory Hole
Auto detect PCI Clock
ClkGen Spread Spectrum
System memory Frequency
SDRAM Timing by SPD
DRAM Refresh
DRAM Cycle time (SCLKs)
CAS# Latency (SCLKs)
RAS to CAS delay (SCLKs)
SDRAM RAS# Precharge (SCLKs)
Internal Graphics Mode Select
Display Cache Window Size
AGP Aperture Window
Local memory Frequency
Initialize Display Cache Memory
Paging Mode Control
RAS – to CAS
RAS Latency
RAS Timing
RAS Precharge Timing
CPU Latency Timer
USB Function
USB Device Legacy Support
Port 64/60 Emulation
ICH Delayed Transaction:
This function allows you to enable or disable PCI 2.1 features
including passive release and delayed transaction.
Safe Mode
Available Options:
Disabled
Safe Mode
Disabled
3.0x
Disabled
3.5x
Open
4.0x
Disabled
4.5x
Disabled
5.0x
Enabled
5.5x
133MHz
6.0x
Enabled
6.5x
7.8us
7.0x
5/7
7.5x
2
8.0x
3
3
1MB
64MB
64MB
100MHz
Enabled
Close
Default
Slow
Slow
Slow
Disabled
All USB Port
ESC:Exit
Disabled
PgUp/PgDn: Modify
Disabled
F1:Help
:Sel
F2/F3:Color
35

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