Advanced Chipset Features - BOSER Technology HS-2620 Manual

Duo mobile processor embedded engine board
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4.6

Advanced Chipset Features

This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You must consider making any changes only if you discover that the
data has been lost while using your system.
Phoenix - AwardBIOS CMOS Setup Utility
System BIOS Cacheable
Memory Hole At 15M-16M
** ON-chip VGA Setting **
On-chip Frame Buffer size
DVMT Mode
DVMT/FIXED Memory Size
Boot Display
Panel Scaling
Panel Number
↑↓← →: Select Item
+/-/PU/PD: Value
F5: Previous Values
26
Advanced Chipset Features
[Enabled]
[Disabled]
[8MB]
[DVMT]
[128MB]
[CRT+LFP]
[Auto]
[800 x 600 18bit]
F10: Save
F6: Fail-Safe Defaults
Item Help
Esc: Quit
F1: General Help
F7: Optimized Defaults

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