Video/Audio Signal Process(2) Circuit Block Diagram - Panasonic HC-V380PP Service Manual

11.4. Video/Audio Signal Process(2) Circuit Block Diagram

IC3401
(VENUS ENGINE)
S CS AVIO D17
S CLK AVIO D14
S DO AVIO B15
IC3702
(SINGLE CLOCK GENERATOR)
6
CLK27 AVL3V D19
1
PW REG3V 4
5
CLK24 M C20
ACLK B1 B20
CLK LR1 G18
AODAT0 F16
AIDAT0 G16
E AVIO RST G15
IO DA AD1
PLUG IN L C14
C11
S CS LCD
CH902
Y3
LVDS TX0P
CH901
LVDS TX0M Y4
CH906
LVDS TX1P AA1
CH905
LVDS TX1M AA2
CH904
LVDS TXCP Y1
CH903
LVDS TXCM Y2
PW REG1.8V
CLKIN CLKOUT
INPUT OUTPUT
PLL 3
BUFFER BUFFER
VDD
OE
FSEL
VSS 2
RL3705
RL3704
RL3708
RL3709
IC901
(LCD COLOR DRIVER)
D0+
B1
D0-
A1
PROTOCOL PARSING,
PARITY DETECTION,
ADVANCED
DESERIALIZER
D1+
FRAME MIXING,
F1
SYNC WARD
DECODING
D1-
E1
OUTPUT
REGISTER
N x PCLK
CLK+
D1
PLL
0
CLK-
C1
1
DDR SDR
FSS
F/XS
F2
XSD
G2
LS0
D4
PSEL0
CONFIGURATION
D3
PSEL1
AND
E3
FM POWER MANAGEMENT
D5
FSS
GND
E5
LS1
E4
TX/RX
C2
C4 E2 F4 B2
IC3701
(AVIO)
CSN/SDA
10
CCLK/SCL
8 CONTROL
CDTIO/CAD0
REGISTER
9
I2C
7
PMADL or PMADR
PMPFIL
MIC SENSE/
CORRECTION FUN.
HPF2
LPF
STEREO
ANALOG
AUDIO
EMPHASIS
BLOCK
I/F
EQ0
MIC POWER,SPK-AMP,
LINE/VIDEO-OUT-AMP
BICK
4 BAND EQ
12
HPF3
LRCK
11
ALC
RUNNING
SDTI
AVERAGE
13
1 BAND EQ
CIRCUIT
SDTO
14
PDN
18
MCKO
16
PMPLL
MCKI
17
PLL
MONO/ DVOL
STEREO SMUTE
PMV
VIN
25 CLAMP LPF
S CLK LCD
S DO LCD
R0 DR0
F6
R1 DR1
F7
R2 DR2
G7
R3
DR3
H7
R4 DR4
G6
R5 DR5
H6
R6 LCD UNIT
DR6
G5
R7
DR7
H5
G0 DG0
A7
G1 DG1
B7
G2 DG2
C6
G3 DG3
C7
G4 DG4
D6
G5 DG5
D7
G6 DG6
E6
G7 DG7
E7
HS HSYNC
H4
VS
VSYNC
G3
PCLK DCLK
G4
VDD C5 PW REG1.8V
D2
GNDA
F5
A2
VDDA
61
TVDD
15 PW REG3V
DVDD
20 PW REG1.8V
PMMICL
LIN1
3
RIN1
4
HPF A/D
LIN2
PMMICR
5
RIN2
6
PMMP
MPWR
MIC POWER
2
SUPPLY
REGFIL
29
AVDD
27 PW SPK3.2V
LDO: 2.3V
PMLO
LOUT
+
31
ROUT
+
32
PMBP
MIN
1
PMSPK
SPP
21
+ +
D/A SPK-AMP
SPEAKER
SPN
22
V OUT
24
HC-V380 VIDEO/AUDIO PROCESS ( 2 ) CIRCUIT BLOCK DIAGRAM
Q3701
PW 5V
+
ECM[L]
-
+
ECM[R]
-
JK6004
(AV JACK)
5 LOUT
1 ROUT
4 VOUT
6 PLUGIN L