Sharp CD-RW5000 Service Manual page 57

IC2 VHiTC9490F/-1: Servo/Signal Control (TC9490F) (2/2)
Pin No. Terminal Name Input/Output
39 AVDD3
40 FMO
41 DMO
42 VSS3
43 VDD3
44 TESIN
45 XVSS3
46 XI
47 XO
48 XVDD3
49 DVSS3
50 RO
51 DVDD3
52 DVR
53 LO
54 DVSS3
55* ZDET
56 VSS5
57-60 BUS0-BUS3 Input/Output
61 BUCK
62 /CCE
63 /RST
64 VDD5
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Note: AI/F: Analog input/output terminal
3-5I/F: Terminal with a built-in 3-5 interface (5V system input/output terminal)
3I/F: 3V system input/output terminal
DVSS3
DVDD3
DVR
DVSS3
ZDET
VSS5
BUS0
BUS1
BUS2
BUS3
BUCK
/CCE
/RST
VDD5
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— Analog 3.3V power supply terminal.
Output Feed equalizer output terminal.
Output Disc equalizer output terminal.
— Digital GND terminal.
— Digital 3.3V power supply terminal.
Input Test input terminal. Usually "L" fixed.
— GND terminal for system clock oscillation circuit.
Input System clock oscillation circuit input terminal.
Output System clock oscillation circuit output terminal.
— 3.3V power supply terminal for system clock oscillation circuit.
— GND terminal for D/A converter.
Output R channel data normal rotation output terminal.
— 3.3V power supply terminal for D/A converter.
— Reference voltage terminal.
Output L channel data normal rotation output terminal.
— D/A converter section GND terminal.
Output 1-bit D/A converter 0 detection flag output terminal.
— GND terminal for microcomputer interface.
Data input/output terminal for microcomputer interface.
Input Clock input terminal for microcomputer interface.
Input Chip enable signal input terminal for microcomputer interface.
In case of "L", BUS3-0 are active.
Input Reset signal input terminal. Reset: "L".
— 5V power supply terminal for microcomputer interface.
48 47 46 45 44 43
49
Clock
RO
50
generator
51
LPF
52
1-bit
DAC
LO
53
54
55
Address
circuit
56
57
Correction
58
circuit
16K RAM
59
60
Digital
Audio output
61
out
circuit
62
63
64
1 4
2 3 5 6
Figure 57 BLOCK DIAGRAM OF IC
Function
42 41 38
40 39 37 36 35
+
PWM
D/A
Servo control A/D
ROM
Digital equalizer
adjustment circuit
RAM
Data
CLV
slicer
servo
Synchronizing
signal guarantee
VCO
EFM demodulation
Sub-code
PLL
demodulation
TMAX
circuit
8 14
7 9 10 11 12 13
– 57 –
CD-RW5000
33
34
32
TEZI
31 TEI
SBAD
30
29
FEI
+
28 RFRP
RFZI
+ 27
26 RFCT
AVDD3
25
RFI
24
23 SLCO
22 AVSS3
21 VCOF
PVREF
20
19
LPFO
+
LPFN
18
17 TMAX
15 16