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IC2 VHiLC78622N-1: Servo/Signal Control (LC78622N) (2/2)
Pin No.
Terminal Name Input/Output
50*
SFSY (NC)
51
SBCK
52*
FSX (NC)
53
WRQ
54
RWC
55
SQOUT
56
COIN
57
/CQCK
58
/RES
59*
TEST11 (NC)
60*
16M (NC)
61
4M
62
TEST5
63
/CS
64
TEST1
Note: The same potential must be supplied to the power terminals (VDD, VVDD, LVDD, RVDD, XVDD).
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
IC701 RH-iX0300AWZZ: System Microcomputer (IX0300AW) (1/2)
Pin No.
Port Name
Terminal Name
1
P94/FIP6
7G
2
P93/FIP5
8G
3
P92/FIP4
1G
4
P91/FIP3
2G
5
P90/FIP2
3G
6
P81/FIP1
4G
7
P80/FIP0
9G
8
VDD
VDD
9
P27/SCK0
DO
10
P26/S00/SB1 DI
11
P25/SI0/SB0
CE
12
P24/BUSY
CLK
13
P23/STB
CD RWC
14
P22/SCK1
CD WRQ
15
P21/S01
CD PCCL
16
P20/SI1
CD COIN
17
RESET
RESET
18
P74
CD SQOUT
19
P73
TIMER LED
20
AVss
AVSS
21
P17
CD CQCK
22
P16
CD DSP RES
23
P15
CD FRF
24
P14/ANI4
A/D T2 RUN
25
P13/ANI3
A/D KEYIN 1
26
P12/ANI2
A/D KEYIN 2
27
P11/ANI1
A/D KEYIN 3
28
P10/ANI0
A/D DIST
29
AVDD
AVDD
30
AVREF
AVREF
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Output
Output terminal of synchronous signal of subcode frame. It drops when subcode stands by.
Input
Clock input terminal to read subcode. Schmit input (Connected to 0V when not used.)
Output
Output terminal of synchronous signal of 7.35kHz divided from quartz oscillation.
Output
Output terminal to stand by output of subcode Q.
Input
Input terminal of read/write. Schmit input.
Output
Output terminal of subcode Q.
Input
Command input terminal from microcomputer.
Input
Clock input terminal to fetch command input, or pick up subcode from SQOUT. Schmit input.
Input
Reset input terminal of LC78622. When turning on power, set it at "L".
Output
Output terminal for test. Used in the open state ("L" output as ordinary).
Output
Output terminal of 16.9344Hz.
Output
Output terminal of 4.2336MHz.
Input
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
Input
Chip selection input terminal. Pull-down resistor is integrated.
Connected to 0when not controlled.
Input
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
Input/Output
Output
FL Display segment driver
Output
FL Display segment driver
Output
FL Display segment driver
Output
FL Display segment driver
Output
FL Display segment driver
Output
FL Display segment driver
Output
FL Display segment driver
—
VDD
Input
Data input
Output
Data output
Output
Chip enable output
Output
Clock output
Output
CD DSP read write cont
Input
CD DSP write request cont
Output
CD DSP PCCL
Output
CD COIN (Data output)
Input
Reset
Input
CD SQOUT (Data input)
Output
TIMER LED control
—
Analog ground
Output
CD CQCK (Clock output)
Output
CD DSP reset
Input
CD RF level detection
Input
Analog data T2 RUN
Input
Key input 1
Input
Key input 2
Input
Key input 3
Input
Key output distination
—
Analog VDD
—
Analog REF voltage
Function
Function
– 39 –
CD-C605H
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