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+B
L354
LOW PASS
FILTER
R350
2.7K
V
C367
1/50
3
22
21
20
19
18
AM IF IN
2
3
4
5
6
7
R352
1K
1
3
T351
2
AM IF
R393
1K
94
16
C392
0.001
C380
93
10/16
0
L351
100µH
R380
C385
1.5K
5.1V
0.01
2.5V
0V
C386
19
18
17
16
15
14
13
12
330P
R376
4
5
6
7
8
9
10 11
1K
5.1V
IC302
LC72131
PLL CONTROLLER
7
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TP302
C373
0.015
C371
R361
1/50
1.2K
R362
C372
1.2K
1/50
17
16
15
14
13
C358
8
9
10 11
12
1/50
R353
R355
270
3.3K
C357
2.2/50
C356
0.001
C355
22P
+B
L352
100µH
R392
390
+B
R385
+B
5.6K
R395
47K
R360
4.7K
Q361
KRC107 M
SWITCHING
3
2
ZD352
DZ3.9BSB
1
R371
1K
Q371
KTA1266 GR
PLL DATA BUFFER
8
9
Figure 23 SCHEMATIC DIAGRAM (8/10)
+B
MUTING
Q353
KTC3199 GR
R365
10K
R367
C375
1K
3.3/50
R368
33K
R366
10K
Q354
KTC3199 GR
MUTING
R354
3.9K
ZD351
DZ5.1BSB
C396
100/10
C395
0.022
R391
390
Q360
+B
R383
5.6K
C391
47/16
D352
DS1SS133
D351
DS1SS133
+B
R387
22K
+B
9 8 7 6 5 4 3 2 1
CNS303
TO MAIN PWB
P21 12-D
10
– 23 –
CD-C605H
CNP303
11
12
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