Advertisement
Timing chart (Lock protection)
HP-HM
FG
OUT1
OUT2
RDO
2.
VSP/ VMI Input Pin
Output starts when VSP pin at the voltage of more than V
Minimum voltage of VSP pin is clipped by the voltage of VMI pin.
In case the minimum duty setting by VMI pin is not used, connect the VMI pin to the GND pin.
Analog voltage which is input to VSP pin and VMI pin is converted by AD convertor of 7 bit, and the output
PWM duty is controlled.
≤ VSP, VMI ≤
0
< VSP, VMI ≤
V
AD (L)
< VSP, VMI ≤
V
AD (H)
100%
0
V
AD(L)
(PWM duty indicates the peak value of output because this circuit has a soft switching function.)
3.
Hall Input Signal
Characteristics of hall signal shown below are inputted to the hall input pin.
HP
HM
OFF (Hi-Z)
OFF (Hi-Z)
T
T
ON
OFF
→
V
AD (L)
→
V
AD (H)
→
V
REG
100%
Vsp
V
AD(H)
V
REG
V
REG
GND
13
. And it turns off at the voltage of V
AD(L)
Duty = 0%
Below figure (17/127 to 116/127)
Duty = 100% (117/127 to 127/127)
0
V
VMI
V
AD(L)
AD(H)
-1.5V
HP
V
H
HM
V
: 40mV or more
H
V
=10mV, V
HHYS+
HHYS-
*Though hall amplifier operates when V
more, please widen the oscillation as possible to
stabilize the time width.
(200mV or more is recommended.)
TC78B002FNG
AD(L)
Vsp
V
HHYS+
V
HHYS-
=-10mV
is 40mV or
H
2013-10-17
or less.
Advertisement
