Post Codes - Acer AS8950G Service Manual

Post Codes

The following are the InsydeH2O™ Functionality POST code tables. The components of the
POST code table includes: SEC phase, PEI phase, DXE phase, BDS phase, CSM functions,
S3 functions and ACPI functions.
Table 4-1. POST Code Range
Phase
SEC 0x0
PEI 0x7
DXE 0x4
BDS 0x1
SMM 0
S3 0
ASL
PostBDS
InsydeH2ODDT™ Reserve
OEM Reserve
Reserved
Table 4-2. SEC Phase POST Code Table:
Functionality Name (Include\
PostCode.h)
SEC_SYSTEM_POWER_ON SEC
SEC_BEFORE_MICROCODE
_PATCH
SEC_AFTER_MICROCODE_P
ATCH
SEC_ACCESS_CSR*
SEC_GENERIC_MSRINIT*
SEC_CPU_SPEEDCFG*
SEC_SETUP_CAR_OK
4-16
POST Code Range
1 - 0x0F
0 - 0x9F
0 - 0x6F
0 - 0x3F
xA0 - 0xBF
xC0 - 0xCF
0x51 – 0x55
0xE1 – 0xE4
0xF9 – 0xFE
0xD0 – 0xD7
0xE8 – 0xEB
0xD8 – 0xE0
0xE5 – 0xE7
0xEC – 0xF8
Phase PostCode
01
SEC 02
SEC 03
SEC 04
SEC 05
SEC 06 Setup
SEC 07
Description
CPU power on and switch to
Protected mode
Patching CPU microcode
Setup Cache as RAM
PCIE MMIO Base Address initial
CPU Generic MSR initialization
CPU speed
Cache as RAM test
Troubleshooting
0