Table of Contents
Advertisement
Digital Input/Output Pin Header
(10-pin JGPIO1)
(see p.8 No. 22)
Signal
Signal
PIN
PIN
Name
Name
2
SIO_GP30
4 SIO_GP31
1
SIO_GP34
3 SIO_GP35
Backlight & Amp Volume Control
(7-pin BLT_VOL1)
(see p.8 No. 8)
LPC Header
(19-pin LPC1)
(see p.8 No. 16)
BL1, BL2
(2-pin BL1)
(see p.8 No. 4)
(2-pin BL2)
(see p.8 No. 2)
Chassis Intrusion Headers
(2-pin CI1, CI2)
(see p.8 No. 21)
Buzzer Header
(2-pin BUZZ1)
(see p.8 No. 15)
Signal
Signal
PIN
PIN
Name
Name
6
SIO_GP32
8
SIO_GP33 10
5
SIO_GP36
7
SIO_GP37
1
PCICLK
GND
SMB_CLK_MAIN
FRAME
SMB_DATA_MAIN
PCIRST#
LAD3
LAD2
+3V
LAD1
GND
LAD0
S_PWRDWN#
+3VSB
SERIRQ#
GND
GND
+5V
48MHz
1
SPKR
+5V
20
Parameter
GPIO input Low voltage
GPIO input High voltage
GPIO output Low voltage Max: 0.4V
GPIO output High voltage Low: 2.4V
PIN Signal Name
Note:
GND
Max. load per GPI/O pin: 12mA
9
JGPIO_PWR
Current Max. 1A per power pin.
PIN
7
6
5
4
3
1
2
1
This connector supports
Trusted Platform Module (TPM)
system, which can securely
store keys, digital certificates,
passwords, and data. A TPM
system also helps enhance
network security, protects
digital identities, and ensures
platform integrity.
This motherboard supports
CASE OPEN detection feature
that detects if the chassis cover
has been removed. This feature
requires a chassis with chassis
intrusion detection design.
Range
Max: 0.8V
Low: 2V
Signal Name
GND
GND
GPIO_BLT_DW
GPIO_BLT_UP
PWRDN
GPIO_VOL_DW
GPIO_VOL_UP
Advertisement
Table of Contents
