Robson Ddr3 Mem Ch-B - Clevo W241BU Service Manual

Robson DDR3 MEM CH-B

V R E F C _U 11 M8
V R E F D _U 11 H 1
MA A 0 N 3
MA A 1 P 7
MA A 2 P 3
N 2
MA A 3
9 , 1 3 MA A [ 1 3. . 0]
P 8
MA A 4
P 2
MA A 0 MA A 5
R 8
MA A 1 MA A 6
R 2
MA A 2 MA A 7
MA A 3 MA A 8
R 3
MA A 4 MA A 9
MA A 5 MA A1 0
MA A 6 MA A1 1 R 7
MA A 7 MA A1 2 N 7
MA A 8 MA A 1 3
MA A 9
MA A1 0 M7
MA A1 1
MA A1 2
MA A 13 M2
9 , 13 A _B A 0
N 8
9 , 13 A _B A 1
M3
9 , 13 A _B A 2
9 D Q MA1 _ [ 3 . . 0]
D QMA 1 _0
D QMA 1 _1
D QMA 1 _2
9 C LK A 1
D QMA 1 _3 K 7
9 C LK A 1 #
K 9
9 C K E A1
9 QS A1 _ [ 3 . . 0]
K 1
QS A 1_ 0 OD T A 1
QS A 1_ 1
9 C S A 1b _0
QS A 1_ 2
9 R A S A1 # K 3
QS A 1_ 3
9 C A S A1 #
9 W EA 1 #
QS A 1_ 0B
9 QS A 1_ 0B
QS A 1_ 1B QS A 1 _0 F 3
9 QS A 1_ 1B
QS A 1_ 2B QS A 1 _1 C 7
9 QS A 1_ 2B
QS A 1_ 3B
9 QS A 1_ 3B
D Q MA 1_ 0 E 7
D Q MA1 _ 1 D 3
QS A 1 _0 B G3
QS A 1 _1 B B 7
9 , 13 ME M_ R S T
OD T A 1
9 O D TA 1
R 20 5
*24 3_ 1% _0 4
9 C LK A 1
R 23 6
*56 _0 4
R 23 7 C 41 1
*56 _0 4 *0 . 0 1u _ 16 V_ X7 R _ 04
9 C LK A 1#
C OMPONEN TS SHOWN AR E EXA MPLES ON LY
A ND N OT NE CE SSA RILY QUA LIFIED
U 1 1 U 1 2
D QA 1 _[ 1 5. . 8] 9
E3 D QA 1 _0 V R E F C _U 12 M8
V R E F C A D QL0 V R E F C A
F7 D QA 1 _2 V R E F D _U 12 H 1
V R E F D Q D QL1 V R E F D Q
F2 D QA 1 _7
D QL2
F8 D QA1 _ 3 MA A 0 N 3
A 0 D QL3 H 3 D QA 1 _6 MA A 1 P 7 A 0
A 1 D QL4 H 8 D QA 1 _4 MA A 2 P 3 A 1
A 2 D QL5 G2 N 2 A 2
D QA 1 _5 MA A 3
A 3 D QL6 H 7 P 8 A 3
D QA1 _ 1 MA A 4
A 4 D QL7 P 2 A 4
MA A 5
A 5 R 8 A 5
MA A 6
D QA 1 _[ 7 . . 0 ] 9
A 6 D 7 R 2 A 6
D QA1 _ 11 MA A 7
T8 A 7 D QU 0 C 3 T8 A 7
D QA1 _ 12 MA A 8
A 8 D QU 1 C 8 R 3 A 8
D QA1 _ 9 MA A 9
A 9 D QU 2 A 9
L7 C 2 D QA1 _ 8 MA A1 0 L7
A 1 0/ A P D QU 3 A 1 0/ A P
A7 D QA1 _ 14 MA A1 1 R 7
A 1 1 D QU 4 A 1 1
A2 D QA1 _ 15 MA A1 2 N 7
A 1 2/ B C D QU 5 A 1 2/ B C
T3 B8 D QA1 _ 10 MA A 13 T3
A 1 3 D QU 6 A 1 3
T7 A3 D QA1 _ 13 T7
A 1 4 D QU 7 A 1 4
M7
A 1 5 A 1 5
MV D D Q
B2 M2
B A 0 V D D # B2 9 , 13 A _B A 0 B A 0
D 9 N 8
B A 1 VD D #D 9 9 , 13 A _B A 1 B A 1
G7 M3
B A 2 VD D #G7 9 , 13 A _B A 2 B A 2
K2
V D D # K2
K8
V D D # K8
N 1
J7 VD D #N 1 N 9 J7
9 C LK A 1
C K VD D #N 9 R 1 K 7 C K
9 C LK A 1 #
C K VD D #R 1 R 9 K 9 C K
9 C K EA 1
C KE VD D #R 9 C KE
MV D D Q
A1 K 1
OD T A 1
L2 O D T V D D Q# A1 A8 L2 O D T
J3 C S V D D Q# A8 C 1 9 C S A1 b_ 0 J3 C S
R AS VD D Q#C 1 C 9 9 R A SA 1 # K 3 R AS
C AS VD D Q#C 9 9 C A SA 1 # C AS
L3 D 2 L3
W E VD D Q#D 2 9 WE A 1 # W E
E9
V D D Q# E9
F1
V D D Q# F1
H 2 QS A 1_ 2 F 3
D QS L VD D Q#H 2 D QSL
H 9 QS A 1_ 3 C 7
D QS U VD D Q#H 9 D QSU
A9 D QMA 1 _2 E 7
D ML VS S # A9 D ML
B3 D QMA 1 _3 D 3
D MU VS S # B3 D MU
E1
VS S # E1
G8
V S S #G8
J2 QS A 1_ 2B G3
D QS L V SS # J2 D QSL
J8 QS A 1_ 3B B 7
D QS U V SS # J8 M1 D QSU
V S S #M1 M9
V S S #M9 P1
T2 VS S # P1 P9 T2
9 , 13 ME M_ R S T
R ES E T VS S # P9 T1 R ES E T
L8 V SS # T1 T9 L8
Z Q V SS # T9 Z Q
R 20 6
B1
*24 3_ 1% _0 4
V S S Q# B1
B9
V S S Q# B9
D 1
V S S Q#D 1
D 8
V S S Q#D 8
E2
V S S Q# E2
J1 E8 J1
N C #J 1 V S S Q# E8 N C #J 1
L1 F9 L1
N C #L 1 V S S Q# F9 N C #L 1
J9 G1 J9
N C #J 9 V S S Q#G1 N C #J 9
L9 G9 L9
N C #L 9 V S S Q#G9 N C #L 9
1 00 -BA L L 10 0 - B A L L
S D R A M D D R 3 S D R A M D D R 3
*K 4 W1 G16 4 6G-B C 1 1 *K 4W 1 G16 46 G-B C 11
CHANNEL A: 64M X 16 bit X8 DDR3 (RANK1)
D QA 1 _[ 2 3. . 16 ] 9
E 3 D QA 1 _2 1
D QL0
F 7 D QA 1 _2 2
D QL1
F 2 D QA 1 _1 6
D QL2
F 8 D QA 1 _2 3
D QL3 H 3 D QA 1 _1 8
D QL4 H 8 D QA 1 _2 0
D QL5 G 2
D QA 1 _1 9
D QL6 H 7
D QA 1 _1 7
D QL7
MV D D Q
D QA 1 _[ 3 1. . 24 ] 9
D 7
D QA 1 _2 8 C 3 9 1 C 39 2 C 39 3 C 3 94 C 3 95
D QU 0 C 3
D QA 1 _2 6
D QU 1 C 8
D QA 1 _3 1
D QU 2
C 2 D QA 1 _2 4
D QU 3
A 7 D QA 1 _2 9
D QU 4
A 2 D QA 1 _2 5
D QU 5
B 8 D QA 1 _3 0
D QU 6
A 3 D QA 1 _2 7
D QU 7
MV D D Q
MV D D Q
B 2
V D D #B 2
D 9
C 4 1 2 C 41 3 C 41 4 C 4 15 C 4 16
VD D #D 9
G 7
VD D #G7
K 2
V D D #K 2
K 8
V D D #K 8
N 1
VD D #N 1 N 9
VD D #N 9 R 1
VD D #R 1 R 9
VD D #R 9
MV D D Q
A 1
MV D D Q
V D D Q#A 1 A 8
V D D Q#A 8 C 1
C 4 3 4 C 43 5 C 43 6 C 4 37
V D D Q #C 1 C 9
V D D Q #C 9
D 2
V D D Q #D 2
E 9
V D D Q#E 9
F 1
V D D Q#F 1
H 2
V D D Q #H 2
H 9
V D D Q #H 9
A 9
V S S #A 9
B 3
V S S #B 3
E 1
V S S #E 1
G 8
V S S #G8
J 2
V SS # J2
J 8
V SS # J8 M 1
MV D D Q
V S S #M1 M 9
V S S #M9 P 1
V S S #P 1 P 9
V S S #P 9 T 1
R 22 4
V SS # T1 T 9
*4. 9 9K _ 1% _0 4
V SS # T9
V R E F C _ U 11 V R E F C _ U 11
B 1
V S S Q#B 1
B 9
V S S Q#B 9
D 1 R 23 2 C 3 87
V S SQ #D 1
D 8 *0 . 1u _1 0V _ X5 R _0 4
V S SQ #D 8
E 2 *4. 9 9K _ 1% _0 4
V S S Q#E 2
E 8
V S S Q#E 8
F 9
V S S Q#F 9
G 1
V S SQ #G1
G 9
V S SQ #G9
MV D D Q
R 22 6
*4 . 9 9 K_ 1% _0 4
VR EF C _ U 12
R 23 4 C 3 89
*0 . 1u _1 0V _ X5 R _0 4
*4 . 9 9 K_ 1% _0 4
Schematic Diagrams
Sheet 14 of 41
C 3 96 C 39 7 C 39 8 C 3 99 C 4 00
Robson DDR3 MEM
CH-B
C 4 17 C 41 8 C 41 9 C 4 20 C 4 21
MV D D Q
C 83 8
+
* 22 0u _4 V _V _A
MV D D Q
R 2 25
* 4. 99 K _1 %_ 04
V R E F D _U 1 1 V R E F D _U 1 1
R 2 33 C 38 8
*0. 1 u_ 10 V _X 5R _ 04
* 4. 99 K _1 %_ 04
MV D D Q
R 2 2 7
* 4. 9 9K _1 %_ 04
V R E F D _U 1 2
R 2 3 5 C 39 0
*0. 1 u_ 10 V _X 5R _ 04
* 4. 9 9K _1 %_ 04
Robson DDR3 MEM CH-B B - 15