JVC XV-S40BK Service Manual page 32

XV-S40BK/XV-S42SL/XV-S45GD/XV-S30BK
2.Pin function (3/3)
Pin No. Symbol
81 33VSS
82 33VDD
83 TX
84 XRESET
85 ENS
86 ENC
87 CPUIRQ
88 CPUCLK
89 CPUDTIN
90 CPUDTOUT
91 MONA
92 MONB
93 MONC
94 NC
95 25VSS
96 25VDD
97 LDCUR(AD6)
98 TDOFS(AD5)
99 TG(AD4)
100 RFENV(AD3)
NJM4580M-X(IC741,IC751):Dual OP amplifier
Block diagram
V+ B OUT B -IN
8 7
B
A
1 2
A OUT A -IN
TC74VHC00FT-X(IC322,IC503) : Write timing control
1.Terminal layout / Block diagram
Vcc 4B 4A
14 13 12
1 2 3
1A 1B 1Y
1-32
I/O
- Ground(For I/O)
- Apply 3.3V(For I/O)
O Digital audio interface
I Reset input (System control)
I Servo DSC serial I/F chip select (System control)
I CIRC serial I/F chip select (System control)
O Interrupt request (System control)
I Syscon serial I/F clock (System control)
I Syscon serial I/F data input (System control)
O Syscon serial I/F data output (System control)
O Connect to TP226 (Monitor terminal A)
O Connect to TP225 (Monitor terminal A)
O Connect to TP224 (Monitor terminal A)
O Connect to TP211
- Ground(For internal core)
- Apply 2.5V(For internal core)
I
I
I Tangential phase difference(FEP)
I RF envelope input(FEP)
B +IN
6 5
3 4
A +IN V-
4Y 3B 3A 3Y
11 10 9 8
4 5 6
7
2A 2B 2Y GND
Function