JVC XV-S40BK Service Manual page 23

KM416S1120DT-G8(IC504,IC505):DRAM
1.Terminal Layout
2.Block Diagram
CLK
ADO
LCKE
LRAS LCBR
CLK
3.Pin Function
Pin No. Symbol
1 Power Supply
VDD
2 Data Input/Output
DQ0
3 Data Input/Output
DQ1
4 To Ground
VSSQ
5 Data Input/Output
DQ2
6 Data Input/Output
DQ3
7 Power Supply
VDDQ
8 Data Input/Output
DQ4
9 Data Input/Output
DQ5
10 To Ground
VSSQ
11 Data Input/Output
DQ6
12 Data Input/Output
DQ7
13 Power Supply
VDDQ
14 Data Input/Mask Output
LDQM
15 Write Enable
WE
16 Column Address Strobe
CAS
17 Raw Address Strobe
RAS
18 Chip Select
CS
19 Address
A11
20 Address
A10
21 Address
A0
22 Address
A1
23 Address
A2
24 Address
A3
25 Power Supply
VDD
Bank Select
LWE LCAS
Timing register
CKE CS RAS CAS
Function
XV-S40BK/XV-S42SL/XV-S45GD/XV-S30BK
Data input register
512K x 16
512K x 16
Column decoder
Latency & burst length
Programming register
LWCBR
WE L(U)DQM
Pin No. Symbol
26 VSS To Ground
27 A4 Address
28 A5 Address
29 A6 Address
30 A7 Address
31 A8 Address
32 A9 Address
33 NC Non Connection
34 CKE Clock Enable
35 CLK System Clock
36 UDOM Data Input/Mask Output
37 NC Non Connection
38 VDDQ Power Supply
39 DQ8 Data Input/Output
40 DQ9 Data Input/Output
41 VSSQ To Ground
42 DQ10 Data Input/Output
43 DQ11 Data Input/Output
44 VDDQ Power Supply
45 DQ12 Data Input/Output
46 DQ13 Data Input/Output
47 VSSQ To Ground
48 DQ14 Data Input/Output
49 DQ15 Data Input/Output
50 VSS To Ground
LWE
LDQM
DQI
LDQM
Function
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