Watchdog Sample Program - Asus Aaeon EPIC-CFS7-PUC User Manual

B.2

Watchdog Sample Program

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// WDT I/O operation relative definition (Please reference to Table 1)
#define WDTAddr
Void WDTWriteByte(byte Register, byte Value);
byte WDTReadByte(byte Register);
Void WDTSetReg(byte Register, byte Bit, byte Val);
// Watch Dog relative definition (Please reference to Table 2)
#define DevReg
#define WDTRstBit 0x80 // Watchdog WDTRST# (Bit7)
#define WDTRstVal 0x80 // Enabled WDTRST#
#define TimerReg
#define PSWidthBit
#define PSWidthVal
#define PolarityBit 0x02
#define PolarityVal 0x00
#define UnitBit
#define ModeBit
#define ModeVal
#define EnableBit
#define EnableVal
#define StatusBit
#define CounterReg 0x06 // Timer counter register
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Main
VOID (){
// Procedure : AaeonWDTConfig
// (byte)Timer : Counter of WDT timer.(0x00~0xFF)
// (boolean)Unit : Select time unit(0: second, 1: minute).
EnterSIOconfig();
SetWDT();
AaeonWDTConfig(Counter, Unit);
// Procedure : AaeonWDTEnable
// This procudure will enable the WDT counting.
AaeonWDTEnable();
ExitSIOconfig();
}
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Appendix B – Watchdog Timer Programming
0x510 // WDT I/O base address
0x00 // Device configuration register
0x05 // Timer register
0x00 // WDTRST# Pulse width (Bit0:1)
0x01 // 25ms for WDTRST# pulse
// WDTRST# Signal polarity (Bit2)
// Low active for WDTRST#
0x03 // Unit for timer (Bit3)
0x04 // WDTRST# mode (Bit4)
0x01 // 0:level 1: pulse
0x05 // WDT timer enable (Bit5)
0x01 // 1: enable
0x06 // WDT timer status (Bit6)
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