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Related Manuals for Winbond ISD1700 Series
Summary of Contents for Winbond ISD1700 Series
- Page 1 PRELIMINARY ISD1700 Series Multi-Message Single-Chip Voice Record & Playback Devices Publication Release Date: February 7, 2006 Revision 1.2...
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Page 2: Table Of Contents
ISD1700 SERIES TABLE OF CONTENTS GENERAL DESCRIPTION ......................5 FEATURES............................6 BLOCK DIAGRAM...........................7 PINOUT CONFIGURATION......................8 PIN DESCRIPTION .........................9 FUNCTIONAL DESCRIPTION ......................13 6.1 Detailed Description.......................13 6.1.1 Audio Quality .......................13 6.1.2 Message Duration......................13 6.1.3 Flash Storage ......................13 6.2 Memory Array Architecture ....................13 6.3 Modes of Operations......................14 6.3.1 Standalone (Push-Button) Mode .................14... - Page 3 ISD1700 SERIES 8.4.1 Microphone Input ......................23 8.4.2 AnaIn Input........................23 CIRCULAR MEMORY MANAGEMENT ..................24 9.1 Restoring Circular Memory Architecture................26 10 SERIAL PERIPHERAL INTERFACE (SPI) MODE ...............27 10.1 Microcontroller Interface ......................27 10.2 SPI Interface Overview ......................27 10.2.1 SPI Transaction Format....................27 10.2.2 MOSI Data Format.......................28 10.2.3 MISO Data Format.......................29...
- Page 4 ISD1700 SERIES 11.2.7 RD_PLAY_PTR (0x06) ....................42 11.2.8 RD_REC_PTR (0x08)....................42 11.3 Analog Configuration Commands..................42 11.3.1 RD_APC (0x44) Read APC Register ................42 11.3.2 WR_APC1 (0x45) Load APC Register ................43 11.3.3 WR_APC2 (0x65) Load APC Register ................43 11.3.4 WR_NVCFG (0x46) Write APC to Non-Volatile Memory ..........44 11.3.5 LD_NVCFG (0x47) Load APC register from Non-Volatile Memory......44...
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Page 5: General Description
This register allows flexible configuration of audio paths, inputs, outputs and mixing. The APC default configuration for standalone mode can also be modified by storing the APC to a non-volatile register (NVCFG) that is loaded at initialization. Utilizing the capabilities of ISD1700 Series, designers have the control and flexibility to implement high-end products. -
Page 6: Features
ISD1700 SERIES 2 FEATURES Integrated message management systems for single-chip, push-button applications : level-trigger for recording : edge-trigger for individual message or level-trigger for sequential playback PLAY : edge-triggered erase for first or last message or level-triggered erase for all messages... -
Page 7: Block Diagram
ISD1700 SERIES 3 BLOCK DIAGRAM Internal Sampling Timing Clock Clock AnaIn AnaIn AUD / Anti- Nonvolatile Aliasing Multi-Level Storage Filter Smoothing Volume Array Filter Control MIC+ MIC- Automatic Gain Control SPI Interface Device Control Power Conditioning REC PLAY ERASE RESET... -
Page 8: Pinout Configuration
ISD1700 SERIES 4 PINOUT CONFIGURATION INT / RDY RESET ERASE MISO MOSI SCLK PLAY ISD1700 AnaIn MIC+ MIC- AUD / AUX SSP2 SSP1 SOIC / PDIP SCLK AnaIn MOSI MIC+ MISO MIC- RESET SSP2 ISD1700 INT / RDY SSP1 AUD/AUX... -
Page 9: Pin Description
ISD1700 SERIES 5 PIN DESCRIPTION PDIP / TSOP FUNCTIONS NAME SOIC Digital Power Supply: It is important to have a separate path for each power signal including V and V to minimize the noise coupling. Decoupling capacitors should be as close to the device as possible. - Page 10 ISD1700 SERIES PDIP / TSOP FUNCTIONS NAME SOIC Ground for Negative PWM Speaker Driver: It is important to have a SSP2 separate path for each ground signal including V and V SSP1 SSP2 to minimize the noise coupling. SP-: The negative Class D PWM provides a differential output with SP+ pin to directly drive an 8 Ω...
- Page 11 ISD1700 SERIES PDIP / TSOP FUNCTIONS NAME SOIC Oscillator Resistor: A resistor connected from R pin to ground determines the sample frequency of the device, which sets the duration. Please refer to the Duration Section for details. Analog Power Supply. It is important to have a separate path for each...
- Page 12 ISD1700 SERIES PDIP / TSOP FUNCTIONS NAME SOIC An open drain output. Ready (Standalone mode): This pin stays Low during record, play, erase and forward operations and stays High in power down state Interrupt (SPI mode): After completing the SPI command, an active low interrupt is generated.
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Page 13: Functional Description
6.1.2 Message Duration The ISD1700 Series offer record and playback duration from 26 seconds to 120 seconds. Sampling rate and message duration are determined by an external resistor connected to the pin. Table 6.1 Duration vs. Sampling Frequency... -
Page 14: Modes Of Operations
ISD1750, four for ISD1760, eight for ISD1790, eight for ISD17120, eight for ISD17150, ten for ISD17180, ten for ISD17210 and ten for ISD17240. 6.3 M ODES OF PERATIONS The ISD1700 Series can operate in either Standalone (Push-Button) or microcontroller (SPI) mode. 6.3.1 Standalone (Push-Button) Mode Standalone operation entails use of the ERASE PLAY pins to trigger operations. -
Page 15: Analog Path Configuration (Apc)
ISD1700 SERIES 7 ANALOG PATH CONFIGURATION (APC) The analog path of the ISD1700 can be configured to accommodate a wide variety of signal path possibilities. This includes the source of recording signals, mixing of input signals, mixing the playback signal with an input signal to the outputs, feed-through signal to the outputs and which outputs being activated. -
Page 16: Device Analog Path Configurations
ISD1700 SERIES Name Description Default SPI_FT For SPI mode only. Once SPI_PU command is sent, 1 = SPI FT is Off is disabled and replaced by this control bit (D6) with the same functionality. After exiting SPI mode through the PD command, the resumes control of feedthrough (FT) function. -
Page 17: Standalone (Push-Button) Operations
ISD1700 SERIES 8 STANDALONE (PUSH-BUTTON) OPERATIONS The user utilizes the pin to initiate an operation. PLAY ERASE RESET The device automatically enters the power-down state at the end of a PLAY, REC, ERASE, FWD, VOL, or RESET operation. 8.1 O... -
Page 18: Playback Operation
ISD1700 SERIES a) When goes Low: • If present, SE1 is played and LED flashes once. • Then, the LED stays On to indicate that a recording is in progress. b) When goes High or when the memory is full: •... -
Page 19: Erase Operation
ISD1700 SERIES • The playback pointer is advanced one message. • If present, SE1 is played. • Playback of the next message begins. • The LED flashes during this entire process. d) If the device is currently playing a message that is the last one: •... - Page 20 ISD1700 SERIES • If the device is currently playing the first or last message, pressing will delete ERASE the current message, as in the related cases described above. b) Global Erase: Level-triggering at Low for more than 2.5 seconds initiates the ERASE Global Erase operation and deletes all messages, except the Sound Effects (SEs).
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Page 21: Reset Operation
ISD1700 SERIES 8.1.5 Reset Operation A 0.1 µF capacitor is recommended to connect to ground if a push button switch is RESET used on this pin. When is triggered, the device will place both the record and the RESET playback pointers at the last message. When a microcontroller is used for a power-on-Reset, must stay active for at least 1 µsec after all supply rails reach their proper... -
Page 22: Entering Se Mode
ISD1700 SERIES Whether or not the SEs are programmed, the LED will flash accordingly. The LED flashes once for SE1, twice for SE2, and so on. The frequency of flashing depends upon the sampling frequency selected and the power supply level used. -
Page 23: Microphone Input
ISD1700 SERIES 8.4.1 Microphone Input INTERNAL TO THE DEVICE Ccoup 0.1uF = 7K MIC + Ccoup MIC IN 0.1uF = 7K MIC - Fcutoff=1/(2*pi*Ra*Ccoup) Figure 8.2: MIC input impedance (When this path is active) 8.4.2 AnaIn Input INTERNA L TO THE DEVICE... -
Page 24: Circular Memory Management
ISD1700 SERIES 9 CIRCULAR MEMORY MANAGEMENT The ISD1700 has a built-in circular memory management protocol to handle message management internally in Standalone mode. Before the device attempts to access memory via push-button controls or the SPI equivalent commands, it checks the memory structure for conformity to this circular memory protocol. - Page 25 ISD1700 SERIES Circular Memory Organization : Record : Erase : Play Erase able Non-erase able (Null) (Null) 0x010 RECORD RECORD RECORD RECORD FWD x2 FWD x3 ERASE FWD x2 ERASE Figure 9.1 Circular Memory Management An example of the Circular memory management is shown in Figure 9.1. Here the memory array starts from an empty state, the ISD1700 detects this and sets the record pointer to point at row 0x010, the first row of normal memory.
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Page 26: Restoring Circular Memory Architecture
ISD1700 SERIES : Record : Erase : Play Erase able Non-erase able RECORD FWD x2 RECORD ERASE ERASE FWD x3 ERASE ERASE Figure 9.2 Further Circular Message Management A Further example of circular memory management is shown in Figure 9.2. Here note how the three REC commands cause message 7 to be split across the end of memory boundary. -
Page 27: Serial Peripheral Interface (Spi) Mode
A four-wire (SCLK, MOSI, MISO & ) SPI interface may be used for serial communication to the ISD1700 device. The ISD1700 Series is configured to operate as a peripheral slave device. All operations may be controlled through this SPI interface. -
Page 28: Mosi Data Format
ISD1700 SERIES 1st Byte 2nd Byte 3rd Byte 4th Byte 5th Byte 6th Byte Data Byte 2 or Data Byte 3 or End Address End Address CMD_Byte Data Byte 1 Start Address Start Address MOSI (Low Byte) (High Byte) (Low Byte) -
Page 29: Miso Data Format
ISD1700 SERIES Bit 39 Bit 38 Bit 37 Bit 36 Bit 35 Bit 34 Bit 33 Bit 32 Byte: End Address (Mid Byte) Bit 47 Bit 46 Bit 45 Bit 44 Bit 43 Bit 42 Bit 41 Bit 40 Byte: End Address (High Byte) -
Page 30: Spi Command Overview
ISD1700 SERIES The status bits of the 1 byte provide important information on the result of the previous command sent. In particular, bit 0 (command error bit) indicates whether the chip is able to process the previous command or not. The address bits <A10:A0> represent the address location. -
Page 31: Switching From Spi Mode To Standalone Mode
ISD1700 SERIES An SPI command always consists of an opcode or command byte. The command byte has one special purpose bit, bit 4 (LED). This bit controls the operation of the LED output. If the user wishes to enable the operation of the LED, all opcodes should have this bit set to 1. -
Page 32: Status Register 0 (Sr0)
ISD1700 SERIES 10.5.1 Status Register 0 (SR0) SR0 is a two bytes data returning from MISO, which includes 5 status bits (D4:D0) and 11 address bits (A10:A0). Size: 16 bits Type: Read Byte #1 Bit # : Name : FULL... -
Page 33: Status Register 1 (Sr1)
ISD1700 SERIES 10.5.2 Status Register 1 (SR1) Size: 8 bits Type: Read Bit Sequence: PLAY ERASE Description: Device secondary status register Access RD_STATUS command. <D7:D0> is the third byte of MISO Table 10.4 Bit description of Status Register 1 Name... -
Page 34: Record Pointer
ISD1700 SERIES Description: Pointer at beginning of current message for circular memory management. Access Read: RD_PLAY_PTR; Changed by FWD, RESET 10.5.5 Record Pointer REC_POINTER Size: 11 bits Type: Read Bit Sequence: REC_POINTER<A10:A0> Description: Pointer at first available row in circular memory. -
Page 35: Spi Command Reference
ISD1700 SERIES 11 SPI COMMAND REFERENCE This section describes the SPI command set. A summary of commands is given in Table 11.1 and commands are detailed in subsequent sub-sections. Table 11.1 SPI Command Reference Instruction Command Byte Description CMD_Data Start Addr End Addr <C7:C0>... -
Page 36: Spi Priority Commands
ISD1700 SERIES RD_APC 0x44 0100 0100 0000 0000 0000 0000 Returns status bits & current row 0000 0000 counter in first 1 2 bytes and the contents of APC register in 3 & 4 bytes. WR_APC1 0x45 0100 0101 <D7:D0>... -
Page 37: Stop (0X02)
ISD1700 SERIES State before Execution Power Down State after Execution Idle/FT Registers Affected SR0: PU bit, SR1: RDY bit This command wakes up the ISD1700 device and make it enter into the SPI idle state. Upon executing this command, PU bit of SR0 and RDY bit of SR1 will be set to 1. This command does not generate an interrupt. -
Page 38: Rd_Status (0X05)
ISD1700 SERIES Description: Read Status and Clear INT State before Execution State after Execution Does not affect state, clears the INT register and pin. Registers Affected SR0: INT bit, EOM bit The Clear Interrupt command reads the status of the device and clears the status of interrupt &... -
Page 39: Devid (0X09) Read Device Id
ISD1700 SERIES State after Execution Registers Affected SR0: PU bit This command places the ISD1700 into power-down mode. It will also enable standalone mode. If command is sent during an active play/record/erase operation, the device will finish the current operation then power down. Under this condition, the device will generate an interrupt. -
Page 40: Rec (0X41)
ISD1700 SERIES State after Execution Playback then Idle Registers Affected SR0, SR1: PLAY & RDY bits The PLAY command starts playback operation from current PLAY_POINTER and stops when it reaches EOM or receives STOP command. During playback, the device will only respond to STOP, RESET, CLR_INT, RD_STATUS and PD commands. -
Page 41: Fwd (0X48)
ISD1700 SERIES Byte Sequence: MOSI 0x43 0x00 MISO Description: Device will ERASE all messages. State before Execution Idle State after Execution Erase then idle Registers Affected SR0, SR1: ERASE,.RDY The G_ERASE command will erase the whole memory array, except the SE portion (row 0x000-0x00F). -
Page 42: Rd_Play_Ptr (0X06)
ISD1700 SERIES command to operate. Upon completion, it will generate an interrupt. If CMD_ERR of SR0 is set then memory failed circular memory check. Upon the sucessful completion of command, the PLAY_POINTER will point to the last message in the line and REC_POINTER will point to the first available memory location. -
Page 43: Wr_Apc1 (0X45) Load Apc Register
ISD1700 SERIES Description: Will read the current contents of the APC register. State before Execution Idle State after Execution No change Registers Affected None This command reads out analog path configuration (APC) register. After sending SR0 and current ADDR the ISD1700 will send out the APC register. This command has 4 bytes. -
Page 44: Wr_Nvcfg (0X46) Write Apc To Non-Volatile Memory
ISD1700 SERIES device is executing an active command otherwise un-intended transients may occur on the analog path. 11.3.4 WR_NVCFG (0x46) Write APC to Non-Volatile Memory WR_NVCFG Opcode 0x46 0x00 Interrupt Byte Sequence: MOSI 0x46 0x00 MISO Description: Write the current contents of the APC register into the non- volatile NVCFG register. -
Page 45: Set Play (0X80)
ISD1700 SERIES 11.4.1 SET PLAY (0x80) Opcode 0x80 0x00 Interrupt SET_PLAY Byte Sequence: MOSI 0x80 0x00 S<7:0> 00000 E<7:0> 00000 0x00 S<10:8> E<10:8> MISO Description: Start a playback operation from start address S<10:0> to end address E<10:0> inclusive or stop at EOM, depending on the D11 of APC... -
Page 46: Set_Erase (0X82)
ISD1700 SERIES 11.4.3 SET_ERASE (0x82) Opcode 0x82 0x00 Interrupt SET_ERASE Byte Sequence: MOSI 0x82 0x00 S<7:0> 00000 E<7:0> 00000 0x00 S<10:8> E<10:8> MISO Description: Start an erase operation from start address S<10:0> to end address E<10:0> inclusive. State before Execution... -
Page 47: Timing Diagrams
ISD1700 SERIES 12 TIMING DIAGRAMS 12.1 ECORD PLAY AND ERASE RStop RSetUp Mic+/-, AnaIn Figure 12.1: Record Operation Publication Release Date: February 7, 2006 - 47 - Revision 1.2... - Page 48 ISD1700 SERIES PLAY PStop PSetUp Sp+, Sp- Playback the Entire Message PLAY PStop PSetUp Sp+, Sp- Start Playback and Stop Playback Figure 12.2: Playback Operation - 48 -...
- Page 49 ISD1700 SERIES ERASE EStop Erase with SE Figure 12.3: Erase Operation Publication Release Date: February 7, 2006 - 49 - Revision 1.2...
- Page 50 ISD1700 SERIES SSmin SCKlow SCKhi SCLK MOSI (TRISTATE) MISO Figure 12.4: SPI Operation PARAMETER SYMBOL UNITS nsec Setup Time nsec Hold Time Data in Setup Time nsec Data in Hold Time nsec Output Delay nsec Output Delay to HighZ nsec µsec...
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Page 51: Absolute Maximum Ratings
ISD1700 SERIES 13 ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS (DIE) Condition Value Junction temperature Storage temperature range C to +150 Voltage Applied to any pads - 0.3V) to (V + 0.3V) Power supply voltage to ground potential -0.3V to +7.0V... -
Page 52: Operating Conditions
ISD1700 SERIES 13.1 PERATING ONDITIONS OPERATING CONDITIONS (DIE) CONDITIONS VALUES Operating temperature range 0°C to +50°C Supply voltage (V +2.4 V to +5.5 V Ground voltage (V Input voltage (V 0 V to 5.5 V Voltage applied to any pins –0.3 V) to (V... -
Page 53: Electrical Characteristics
ISD1700 SERIES 14 ELECTRICAL CHARACTERISTICS DC P 14.1 ARAMETERS PARAMETER SYMBOL UNITS CONDITIONS Supply Voltage Input Low Voltage -0.3 0.3xV Input High Voltage 0.7xV Output Low Voltage -0.3 0.3xV = 4.0 mA Output High Voltage 0.7xV = -1.6 mA Record Current = 5.5 V, No load,... -
Page 54: Ac Parameters
ISD1700 SERIES AC P 14.2 ARAMETERS CHARACTERISTIC SYMBOL UNITS CONDITIONS Sampling Frequency Vcc=2.4 V~5.5V Duration Section 6.1.2 Vcc=2.4 V~5.5V, all Fs Rising time nsec Falling Time nsec Debounce Time msec =12 kHz Vcc=2.4 V~5.5 V (REC, PLAY, ERASE, msec =8 kHz... -
Page 55: Typical Application Circuits
ISD1700 SERIES 15 TYPICAL APPLICATION CIRCUITS The following typical applications examples on ISD1700 Series are for references only. They make no representation or warranty that such applications shall be suitable for the use specified. Each design has to be optimized in its own system for the best performance on voice quality, current consumption, functionalities and etc. - Page 56 ISD1700 SERIES Example #2: Recording using AnaIn input via push-button controls Reset RESET PLAY µ 0.1 F vAlert ERASE 1 K Ω µ 0.1 F µ 0.1 F SCLK ISD1700 MOSI µ 0.1 F µ 0.1 F SSP1 MISO SSP2...
- Page 57 ISD1700 SERIES Example #3: Connecting the SPI Interface to a microcontroller Reset RESET PLAY µ 0.1 F vAlert ERASE 1 K Ω µ 0.1 F µ 0.1 F SCLK To uC ISD1700 MOSI µ 0.1 F µ 0.1 F SSP1...
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Page 58: Good Audio Design Practices
ISD1700 SERIES Example #4: Connecting the ISD1700 with PowerSpeech W567 15.1 UDIO ESIGN RACTICES To ensure the highest quality of voice reproduction, it is important to follow good audio design practices in layout and power supply decoupling. See recommendations from below links or other Application Notes in our websites. -
Page 59: 28-Lead 8X13.4Mm Plastic Thin Small Outline Package (Tsop) Type 1 - Iqc
The backside of the die is internally connected to V . It MUST NOT be connected to any other potential or damage may occur. Please contact the local Winbond Sales Offices or Representatives for details on (x,y) coordinates. - 59 -... -
Page 60: Packaging
ISD1700 SERIES 17 PACKAGING 17.1 28-L 13.4 (TSOP) T 1 - IQC LASTIC MALL UTLINE ACKAGE θ Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. 0.047 1.20 0.002 0.006 0.05 0.15 0.95 0.040 1.00 0.035 0.041... -
Page 61: 28-Lead 300-Mil Plastic Small Outline Integrated Circuit (Soic)
ISD1700 SERIES 17.2 28-L 300-M (SOIC) LASTIC MALL UTLINE NTEGRATED IRCUIT 28 27 26 25 24 23 22 21 20 19 18 17 16 15 2 3 4 5 6 7 8 9 10 11 12 13 14 Plastic Small Outline Integrated Circuit (SOIC) Dimensions... -
Page 62: 28-Lead 600-Mil Plastic Dual Inline Package (Pdip)
0.008 0.010 0.012 0.20 0.25 0.30 0.070 0.075 0.080 1.78 1.91 2.03 0° 15° 0° 15° 16.4 D NFORMATION For die info, please conatct the local Winbond Sales Representatives. Publication Release Date: February 7, 2006 - 62 - Revision 1.2... -
Page 63: Ordering Information
(SOIC) Package = Plastic Dual Inline Package (PDIP) When ordering ISD1700 devices, please refer to the above ordering scheme. Conatct the local Winbond Sales Representatives for any questions and availability information. For the latest product information, please access Winbond’s worldwide web site at http://www.winbond-usa.com... -
Page 64: Version History
ISD1700 SERIES 19 VERSION HISTORY VERSION DATE DESCRIPTION July 2005 Initial version Revise INT to /INT Aug 2005 Revise MISO pin description Add Switching from SPI mode to User mode section Update SPI command reference table Add operating conditions for packaged units...
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