Basler aviator Camera Link Manual page 19

AW00083108000
(3) - (4):
The line valid and data valid bits become low for 8 pixel clock cycles.

On the pixel clock cycle where data transmission for line 2 begins, the line valid and data valid

bits will become high. On this clock cycle, data stream D0 will transmit data for pixel 1 in
line 2.
On the next pixel clock cycle, the line valid and data valid bits will still be high. On this clock

cycle, data stream D0 will transmit data for pixel 2 in line 2.
On the next pixel clock cycle, the line valid and data valid bits will still be high. On this clock

cycle, data stream D0 will transmit data for pixel 3 in line 2.
This pattern will continue until all of the pixel data for line 2 have been transmitted.

Further steps:
The line valid and data valid bits become low for 8 pixel clocks.

The camera will continue to transmit pixel data for each line as described above until all of the

lines in the frame have been transmitted. After all of the lines have been transmitted, the frame
valid, line valid, and data valid bits will all become low indicating that a valid frame is no longer
being transmitted.
A --> varies depending on the camera model as shown in the table below.
avA1000-120km/kc
(at 1024 x 1024)
8.28 ms
B = 2 x pclk
C = CL Inter-line delay value (*)
D = [ (AOI Width) ] x pclk
(*) The inter-line delay parameter determines the delay between the end of transmission of a line
and the start of transmission of the next line (within a frame).
Per default the inter-line delay value is set to 4. You can adapt the inter-line delay value to your
requirements.
For information about how to configure the inter-line parameter, see the aviator Camera Link User's
Manual (AW000830xx000).
Basler aviator Camera Link
avA1600-65km/kc avA1900-60km/kc
(at 1600 x 1200)
14.47 ms
E = 6 x pclk
F = [ (AOI Height) x (D + C) ] x pclk
avA2300-30km/kc
(at 1920 x 1080) (at 2330 x 1750)
15.30 ms
Pixel Data Output
29.41ms
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