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P5SD-B User's Manual
4: Reference Information – 4.4
P5SD-B Rev.1.1 CPU Jumper Settings
Function
JP1, 2, 3
External
Clock
Note: The external clock setting also sets the AGP and PCI bus clocks
JP10, 11, 12
Internal
Clock Factor
JP14
CPU Core Voltage
On= Jumper cap on, space in table is blank if no cap on
CPU I/O
Voltage (Vio)
Settings
Ext. Clk AGP
PCI
60
60
30
66.8
66.8
33.4
68.5
68.5
34.3
75
64
32
75
75
37.5
83.3
66.6
33.3
90
60
30
100
66.6
33.3
Clk. Factor
JP10
1.5/3.5 X*
1-2
2.0 X
2-3
2.5 X
2-3
3.0 X
1-2
4.0 X
2-3
4.5 X
2-3
5.0 X
1-2
1-2
3-4
1.8V
On
On
2.0V
On
On
2.2V
2.5V
2.8V
On
2.9V
On
3.1V
On
3.3V
On
3.5V
On
JP13
STD 3.3V
VRE 3.5V
JP1
JP2
JP3
2-3
2-3
2-3
1-2
2-3
2-3
2-3
2-3
1-2
2-3
1-2
2-3
1-2
2-3
1-2
1-2
1-2
2-3
2-3
1-2
1-2
1-2
1-2
1-2
JP11
JP12
1-2
1-2
2-3
2-3
1-2
2-3
2-3
2-3
2-3
2-3
5-6
7-8
9-10
On
On
On
On
On
On
On
On
On
On
On
On
On
On
5-6
[D]
3-4
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