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Nokia RH-9 Series Ccs Technical Documentation

System module & ui, transceivers
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CCS Technical Documentation
RH-9 Series Transceivers
System Module & UI
ãNokia Corporation
Issue 1 11/02

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Summary of Contents for Nokia RH-9 Series

  • Page 1 CCS Technical Documentation RH-9 Series Transceivers System Module & UI ãNokia Corporation Issue 1 11/02...

  • Page 2: Table Of Contents

    JTAG & Ostrich Interface ..................67 DAI.......................... 67 Test modes (SW dependant) ................... 67 Test points ....................... 69 List of unused UEM pins ..................69 List of unused UPP pins ....................70 Transceiver RH-9 - RF Module ................... 72 Page 2 ãNokia Corporation Issue 1 11/02...
  • Page 3 Fig 24 AMD Synchronous Burst Read ................59 Fig 25 Production/Test/After sales interface ...............67 Fig 26 RF Frequency plan ....................74 Fig 27 Power distribution diagram ..................76 Fig 28 Block Schematic .......................77 Fig 29 Simplified Synthesizer....................79 Issue 1 11/02 ãNokia Corporation Page 3...
  • Page 4 System Module & UI CCS Technical Documentation Fig 30 Simplified Mjoelner BB, either I or Q channel ............79 Fig 31 Gain control ......................80 Fig 32 DC compensation principle ..................81 Fig 33 Power Loop ......................82 Page 4 ãNokia Corporation Issue 1 11/02...

  • Page 5: Abbreviations

    TBSF Through the Board Side Firing Universal Energy Management Universal Phone Processor CSTN Colour Super Twisted NematicCharger detection threshold level DBEF Double Brightness Enhancement Foil t-BEF thin Brightness Enhancement Foil Enhanced Specular Reflector Issue 1 11/02 ãNokia Corporation Page 5...

  • Page 6: Transceiver Rh-9 - Baseband Module

    • High resolution (98*67) , 12 -bit colour display • 4 TBSF White LEDs • Charge pump IC with constant current generator for driving the white LEDs • 4Mbit external SRAM) • No shielding can above the memory ICs Page 6 ãNokia Corporation Issue 1 11/02...

  • Page 7: Technical Summary

    1.8 V or 3.0 V. The core of the UPP is supplied with a programmable voltage of 1.0 V, 1.3 V, 1.5 V or 1.8 V. UPP operates from a 26MHz clock, coming from the RF ASIC MJOELNER, the 26 MHz Issue 1 11/02 ãNokia Corporation Page 7...

  • Page 8: Technical Specifications

    Reduced performance and +55 °C … +85 °C < -40 °C or > +85 °C No operation and/or storage No storage or operation. An attempt to operate may damage the phone perma- nently Page 8 ãNokia Corporation Issue 1 11/02...

  • Page 9: Dc Characteristics

    Signal Note VR1A 4.6V 4.75V 4.9V Imax = 10mA VR1B 4.6V 4.75V 4.9V Not used 2.70V 2.78V 2.86V = 100mA 3.20V 3.3V 3.40V 2.70V 2.78V 2.86V = 20mA 2.70V 2.78V 2.86V Not used Issue 1 11/02 ãNokia Corporation Page 9...

  • Page 10: Internal Signals And Connections

    Load Resistance (EARP to EARN) Load Capacitance (EARP to EARN) MIDI Table 9: Connections between UPP and LM4890 Signal From Parameter Min. Max. Unit Notes Shutdown GENIO[14] Shutdown LM4890 detec- (p. 5) tions treshold levels Page 10 ãNokia Corporation Issue 1 11/02...
  • Page 11 O.2x V Logic Low = 0.5mA, 0.5mA 0.3 x V Logic Low Data setup time Data hold time SCLK SCLK Serial clock 0.7 x V Logic High input 0.3 x V Logic Low Issue 1 11/02 ãNokia Corporation Page 11...
  • Page 12 RFCONV (9:0) RF / BB analogue signals RXIINP MJOE Voltage swing 1.35 1.45 Positive in-phase LNER Rx signal DC level 1.35 I/Q amplitude mismatch I/Q phase mis- Deg. match Data clock rate Page 12 ãNokia Corporation Issue 1 11/02...
  • Page 13 1.20 1.25 Source imped- ance Data clock rate TXIOUTN MJOEL- Differential 2.15 2.25 Negative TX sig- voltage swing nal (program-able voltage swing) DC level 1.17 1.20 1.23 Source imped- ance Data clock rate Issue 1 11/02 ãNokia Corporation Page 13...
  • Page 14 TX – chain, Power Current Loop Control and Digital logic MJOEL- Output voltage 2.64 2.78 2.86 Supply to: Ref. Osc. Current MJOEL- Output voltage 2.64 2.78 2.86 Supply to: PLL, Divider, LO Current buffers Page 14 ãNokia Corporation Issue 1 11/02...
  • Page 15 LCDCAMCLK Only active when (Write) 3.25 bus-enable is (Read) 0.650 active Connection for regulators active during sleep Table 14: Connections for regulators active during sleep X387 Externally Regulators FLASH (SIM MJOELNER circuit con.) Issue 1 11/02 ãNokia Corporation Page 15...

  • Page 16: Current Consumption During Sleep

    Current consumption in sleep (SLEEPX = low) < 5 µA VDD18 VDDIO1-4 < 300uA (depends on I/O config) VDDA < 5uA 20 µA FLASH SRAM <8uA VDDI <150µA 5 µA MJOELNER VDDDL SELADDR Totally Specification: Max: 500uA <493uA Page 16 ãNokia Corporation Issue 1 11/02...

  • Page 17: External Signals And Connections

    System connector (X102) Table 15: DC connector Signal Condition Note VCHAR 11.1V 16.9 V Standard Charger positive peak peak charger input 7.9 V (ACP-7) 1.0 A peak 8.4 V 9.2 V Fast charger 850 mA Issue 1 11/02 ãNokia Corporation Page 17...
  • Page 18 DC-OUT (J307,J308 & J309) Table 19: DC-OUT Connections Name Parameter Unit Notes J307 Power Voltage (open) Vbat Output power line Current (short) J308 CTI(Input) Resistor value 30.9 kΩ Cover detection J309 Ground SIM (X387) Page 18 ãNokia Corporation Issue 1 11/02...

  • Page 19: Functional Description

    Additionally two modes exist for product verification: 'testmode' and 'local mode'. No supply In NO_SUPPLY mode, the phone has no supply voltage. This mode is due to disconnection of main battery or low battery voltage level. Issue 1 11/02 ãNokia Corporation Page 19...
  • Page 20 Table 21: Regulator controls Regulator NOTE VFLASH1 Enabled; Low Iq mode during sleep VFLASH2 Not used in NHM-8, must be kept disabled VANA Enabled; Disabled in sleep mode Page 20 ãNokia Corporation Issue 1 11/02...
  • Page 21 UEM switch off when the battery voltage has reached VBATLim (programmable charging cut-off limits 3.6V / 5.0V / 5.25V). Charging current is monitored by measuring the voltage drop across a 220 mOhm resistor. Detailed description of the charging func- Issue 1 11/02 ãNokia Corporation Page 21...

  • Page 22: Charging

    1. Check that the charger output (voltage and current) is within safety limits. 2. Identify the charger. 3. Check that the charger is within the charger window. If the charger is accepted and identified, the appropriate charging algorithm is initiated. Page 22 ãNokia Corporation Issue 1 11/02...

  • Page 23: Fig 2 Uem Charging Circuitry

    Charger Interface Protection In order to ensure safe operation with all chargers and in misuse/fail situations charger interface is protected using transient voltage suppressor (TVS) and 1.5A fuse. TVS used in RH-9 is 16V@175W device. Issue 1 11/02 ãNokia Corporation Page 23...

  • Page 24: Charging Circuitry Electrical Characteristics

    VCOFF- VCHAR detection threshold level DET+ VCHDET- Continuous input current (fast charger) Maximum input current (std charger) peak Start-up mode charging current START PWM mode charge current 1.45 Output voltage (Battery voltage) VBAT Page 24 ãNokia Corporation Issue 1 11/02...

  • Page 25: Power Up And Reset

    PURX signal in order to always give the same watchdog response time to the MCU. Power up with PWR key When the Power on key is pressed the UEM enters the power up sequence as described in Issue 1 11/02 ãNokia Corporation Page 25...
  • Page 26 If phone is in POWER_OFF mode when RTC alarm occurs the wake up procedure is as described in section Power Up and Reset. After baseband is powered on an interrupt is given to MCU. When RTC alarm occurs during ACTIVE mode the interrupt for MCU is generated. Page 26 ãNokia Corporation Issue 1 11/02...

  • Page 27: A/D Channels

    (CTI), VCXOTEMP is not used in NHM-8. Table 24: Slow A/D converter characteristics Characteristics Unit Number of bits bits Integral non linearity +/- 2 Differential non linearity +/- 2.5 µs Conversion time Issue 1 11/02 ãNokia Corporation Page 27...
  • Page 28 Con- nection of the charger is performed by the rising edge of the charger input. The charger must be a full wave rectifier. A half wave rectifier charger have to be rejected. Page 28 ãNokia Corporation Issue 1 11/02...

  • Page 29: Lcd & Keyboard Backlight

    LCD Backlight consists of 2 TBSF (Through the Board Side Firing) white LEDs which are placed on the main PWB below the LCD area. They lit into the light guide where the light is distributed to generate sufficient backlight for the LCD. Issue 1 11/02 ãNokia Corporation Page 29...
  • Page 30 LEDs for LCD, and a shared output is used for Keyboard LEDs (10mA). By appropriate SW the driver can be PWM controlled for dimming purpose. Figure 3: Shared LED driver circuit for LCD and Keyboard backlight Page 30 ãNokia Corporation Issue 1 11/02...

  • Page 31: Lcd Cell

    : 0.50mm • Viewing area (width x height) : 35.4mm x 27.7mm • Active pixel area (width x height) : 31.15mm x 24.78mm • Number of pixels : 98 columns x 67 rows Issue 1 11/02 ãNokia Corporation Page 31...

  • Page 32: Sim Interface

    The threshold voltage is calculated from the battery size specifications. The SIM interface is powered up when the SIMCardDet signal indicates ”card in”. This signal is derived from the BSI signal. Page 32 ãNokia Corporation Issue 1 11/02...

  • Page 33: Fig 5 Rh-9 Lcd Module

    The clock supplied to the card is 3.25 MHz. The data baudrate is SIM card clock fre- quency divided by 372 (by default), 64, 32 or 16. The protocol type, that is supported, is T=0 (asynchronous half duplex character transmission as defined in ISO 7816-3). Issue 1 11/02 ãNokia Corporation Page 33...

  • Page 34: Internal Audio

    UEM and the earpiece driver in UEM is a bridge amplifier. Figure 8: Speaker Interface EARP EARP EARN EARN Earpiece Acoustic Design The earpiece acoustics is designed to be type approved by type 3.2, low leak artificial ear Page 34 ãNokia Corporation Issue 1 11/02...

  • Page 35: Fig 7 Uem & Upp Sim Connections

    RC-filters is chosen. This is a solution that has previously been used with success in other phones. The RC filter (220 Ω, 4.7µF) is scaled to provide damping at 217 Hz. 217 Hz Issue 1 11/02 ãNokia Corporation Page 35...
  • Page 36 The speaker have a protective shield directly in front of the diaphragm. The speaker substitutes the original buzzer. Alerting tones and MIDI melodies is generated by the speaker, which is controlled by a Page 36 ãNokia Corporation Issue 1 11/02...

  • Page 37: Accessories

    XEARN Vbat 100k 42 ohm / 100 MHz SALT 42 ohm / 100 MHz BYPASS Interface to DC-out GENIO14 SHUTDOWN Placed outside Placed near BB-can, near SALT Accessories Batteries RH-9 supports Li-Ion batteries. Issue 1 11/02 ãNokia Corporation Page 37...

  • Page 38: Fig 10 Interface Between The Midi-Circuit And The Uem

    RH-9 is designed to support fully differential external audio accessory connection. A headset and PPH-1 can be directly connected to system connector. Detection of the dif- ferent accessories is made in analog way by reading the DC voltage value of EAD con- verter. Page 38 ãNokia Corporation Issue 1 11/02...

  • Page 39: Fig 11 Mechanical Layout And Interconnections Of Dct-4 Battery

    HookInt signal is used to detect when the button of the headset is pressed. Note: Charging must be disabled during identification of PPH-1. Headset Detection Supported headsets are 4-wire fully differential accessories. Detection of the headset can be split into five main phases: Issue 1 11/02 ãNokia Corporation Page 39...

  • Page 40: Fig 12 Headset Interface

    2.064 2.182 2.302 PPH-1 External Mic 2.487 2.603 2.720 PPH-1 Internal Mic 1.840 PPH-1 Speaker Mute The PPH-1 has a function of speaker mute. It can be muted by setting micbias in low Page 40 ãNokia Corporation Issue 1 11/02...
  • Page 41 BSI resistors in the battery packs. Detection is done in the same way as currently used for the BSI. By using the "CTI" it gives the possibility to categorise the covers in different groups (i.e. Current consumption or the like). Issue 1 11/02 ãNokia Corporation Page 41...

  • Page 42: Keyboard

    UPP has internally pull-up resistors on those lines. When a key is pressed, the specific lines where the key is placed is pulled low. This generates an interrupt to the MCU and the MCU now starts its scanning procedure. Page 42 ãNokia Corporation Issue 1 11/02...

  • Page 43: Rf Interface Block

    These requirements must be met over temperature, voltage, and component lot varia- tions. The picture below shows a schematic of the used interface. C420 R420 R426 C426 C420 = 47pF, C426 = 1nF, R420 = 1k Ω , and R2426 = 1k Ω Issue 1 11/02 ãNokia Corporation Page 43...
  • Page 44 UPP side, but still large enough for C420 to have low impedance compared to R420. Choosing C420=47pF, corresponding to a reac- tance of 130ohm, the time constant for removal of DC jumps is C420*(R420+R426)=94ns. Page 44 ãNokia Corporation Issue 1 11/02...

  • Page 45: Memory Module

    When high, ouputs are disabled and placed in high impedance state. Write Enable: When low, activates the databus to be input. Address and data are latched either on rising edge of WE# or CS # or falling edge of CS Issue 1 11/02 ãNokia Corporation Page 45...
  • Page 46 AC operating conditions, test conditions (Test Load and Test Input/Output Reference) • Input pulse level: 0.2 to Vcc-0.2V • Input rising and falling time: 5ns • Input and output reference voltage:0.9V • Output load (see figure): cL=100pF + 1 TTL, cL=30pF + 1TTL Page 46 ãNokia Corporation Issue 1 11/02...

  • Page 47: Fig 15 Ac Characteristics For Sram

    Figure 16: Timing diagrams of read cycles Issue 1 11/02 ãNokia Corporation Page 47...

  • Page 48: Fig 16 Timing Diagrams Of Read Cycles

    RH-9 System Module & UI CCS Technical Documentation Page 48 ãNokia Corporation Issue 1 11/02...
  • Page 49 The RH-9 project has two flash suppliers, Intel and AMD. Device operations are similar for both suppliers, with some differences as described in the following sections. Depend- ing on volume requirements and supplier capabilities, it is also possible that ST will be a third supplier. Issue 1 11/02 ãNokia Corporation Page 49...
  • Page 50 The signal descriptions for the Intel device are listed in the following table: Note: # indicates that the pin is active-low Table 33: Intel signal description Symbol Type Name and Function A16-A21 Address Inputs: for memory addresses Page 50 ãNokia Corporation Issue 1 11/02...
  • Page 51 Also, the AMD device uses one additional signal, PS. This pin is not connected on the Intel device. Figure 17: Intel-AMD signal deviations description Symbol Type Description Issue 1 11/02 ãNokia Corporation Page 51...

  • Page 52: Fig 17 Intel-Amd Signal Deviations Description

    UPP before being stored or processed. The PS signal is a common signal for all the devices connected to the MEMADDA[23:0] bus. Below is an example of how this signal operates. Page 52 ãNokia Corporation Issue 1 11/02...
  • Page 53 (in the hardware configuration software) and is therefore not used at all. Intel The locking scheme offers two levels of protection. The first allows software-only control of block locking (useful for frequently changed data blocks) while the second requires Issue 1 11/02 ãNokia Corporation Page 53...

  • Page 54: Fig 18 An Xor Comparison Of The Data Indicates More Equal Bits

    Memory Operation Read The flash allows asynchronous random access read and synchronous burst read. CE# - low selects the device and puts it in asynchronous read mode. For all read modes, Page 54 ãNokia Corporation Issue 1 11/02...
  • Page 55 Partition A and start writing to another block in Partition A. It resumes erase once the write is completed. It is however, not possible to suspend an erase in partition B for writing to another block in this partition. Issue 1 11/02 ãNokia Corporation Page 55...
  • Page 56 The output enable access time is the delay from the falling edge of the OE# to valid data at the output. Both flashes have a 40 MHz clock rate. Intel Some of the more important timing Specifications for the Intel flash are: Figure 20: Intel Asynchronous Read Asynchronous Read Intel Page 56 ãNokia Corporation Issue 1 11/02...

  • Page 57: Fig 20 Intel Asynchronous Read

    OE# low to output delay Max. 35ns GLQV Figure 21: Intel Synchronous Four-Word Burst Read Synchronous Four-Word Burst Read Intel Address to output delay Max. 85ns AVQV R304 t CLK to output delay Max. 14ns CHQV Issue 1 11/02 ãNokia Corporation Page 57...

  • Page 58: Fig 21 Intel Synchronous Four-Word Burst Read

    ELWL Data setup to WE# High Min. 60ns DVWH Address setup to WE# High Min. 60ns AVWH Vpp setup to WE# high Min. 200ns VPWH ADV# setup to WE# high Min. 70ns VHWH Page 58 ãNokia Corporation Issue 1 11/02...

  • Page 59: Fig 22 Intel Write

    Figure 23: AMD Asynchronous Read Asynchronous Read Output enable to output valid Max. 35ns Access time from CE#-low Max. 90ns Asynchronous Access time Max. 90ns Figure 24: AMD Synchronous Burst Read Synchronous Read Issue 1 11/02 ãNokia Corporation Page 59...

  • Page 60: Flash Programming

    UPP via the UEM and the connections correspond to a logic level of 2.7 V. The flash prommer is connected to the UEM via the MBUS (bi-direc- Page 60 ãNokia Corporation Issue 1 11/02...
  • Page 61 UEM master reset and when PURX is low. The BSI signal should not change state in normal operation unless the battery is removed in which case the BSI signal will be pulled high. MCU Boot Issue 1 11/02 ãNokia Corporation Page 61...
  • Page 62 EEPROM that is used in the system. The flashes used in RH-9 all have RWW capability. Third Word This word contains similar information as the first word, but the information is about the second flash if such is used. Fourth Word Page 62 ãNokia Corporation Issue 1 11/02...

  • Page 63: Emc Strategy

    The edge of the pwb has been designed to control the direction of the ESD pulse by Issue 1 11/02 ãNokia Corporation Page 63...
  • Page 64 EAR lines are output signals, also routed on shielded layer 5, to obtain immunity for conducted emission towards UEM. Internal EAR lines are EMC/ESD protected by radiated fields from the earpiece by Z150 and further suppressed by the low impedance signal path in the pwb. Page 64 ãNokia Corporation Issue 1 11/02...

  • Page 65: Lcd Metal Frame

    The LCD metal frame is connected to the PWB ground, via springs in all four corners. Bottom connector The immunity strategy concerning the bottom connector lines is by shielding all lines to this part in order to prevent radiation in the phone itself when external accessory is con- Issue 1 11/02 ãNokia Corporation Page 65...

  • Page 66: Mechanical Shielding

    (FLALI/FINUI/LABEL). Production / After Sales Interface Test pads are placed on engine PWB, for service and production purposes, same test pat- tern is used for after sales purposes as well: Page 66 ãNokia Corporation Issue 1 11/02...

  • Page 67: Flash Interface

    Flash programming is explained in section Flash Programming. Table 34: Flash interface signals Note Signal TX_D 2.7V 3.0V RX_D 2.7V 3.0V 2.7V 3.0V Flash programming voltage 2.7V Battery size indication. Falling edge required for flash programming. Issue 1 11/02 ãNokia Corporation Page 67...

  • Page 68: Fbus Interface

    DAI measurements. Clock signal is connected to UPP pin GenTest(0). Test modes (SW dependant) The phone can be activated in different SW modes by applying specific resistor values between BSI/Btemp lines and GND. The modes are: Page 68 ãNokia Corporation Issue 1 11/02...
  • Page 69 0 – 1k > 1k Local mode 0 – 1k 0 – 1k Local mode (Fast start-up) > 1k 0 – 1k Test mode (Fast start-up) 56k - 130k > 4k Normal mode Issue 1 11/02 ãNokia Corporation Page 69...

  • Page 70: Test Points

    Not used with Mjoelner AFCOUT Not used with Mjoelner VREFRF02 Unused RF reference VR1B Unused RF regulator Unused RF regulator VFLASH2 Spare BB supply IPA1 Unused current sources IPA2 UEMRSTX For use with switchmode converter SMPSCLK Page 70 ãNokia Corporation Issue 1 11/02...

  • Page 71: List Of Unused Upp Pins

    PUP: GenIO in/out in,CR0 0, CR0 GenIO20 PUP: GenIO in/out out,0 1, CR1 GenIO21 PUP: GenIO in/out In,CR1 1, CR1 GenIO22 PUP: GenIO in/out in,CR0 0, CR0 GenIO24 PUP: GenIO in/out In,CR1 1, CR1 Issue 1 11/02 ãNokia Corporation Page 71...
  • Page 72 RH-9 System Module & UI CCS Technical Documentation GenIO25 PUP: GenIO in/out In,CR1 1, CR1 GenIO27 PUP: GenIO in/out In,CR1 1, CR1 GenIO28 PUP: GenIO in/out out,1 1, CR1 Page 72 ãNokia Corporation Issue 1 11/02...

  • Page 73: Transceiver Rh-9 - Rf Module

    The engine use internal antenna based on a superstrate loaded PIFA structure, which means that the metal patch is placed between the dielectric material and the ground plane. The interconnection between antenna and PWB allows disconnection of the antenna through a special coaxial connector. Issue 1 11/02 ãNokia Corporation Page 73...

  • Page 74: Main Technical Specifications

    DC characteristics Regulators The transceiver has a multi function power management IC (UEM) in the baseband sec- tion, which contains among other functions six 2.78V regulators, a 1.8 V regulator and two reference outputs. Page 74 ãNokia Corporation Issue 1 11/02...

  • Page 75: Fig 26 Rf Frequency Plan

    Typical current consumption The table shows the typical current consumption in different operation modes. Table 37: Typical current consumption Operation mode Current Con- Notes sumption Power OFF < 10uA Leakage current (dual PA) Issue 1 11/02 ãNokia Corporation Page 75...
  • Page 76 LNA and Pre-gain @ 50 mA BB Section 1.8 V +/- 4.5 % Digital com. interface @ 150 mA VCO module 2.78 V +/- 3 % @ 45 mA Vbat Dual Band PA Page 76 ãNokia Corporation Issue 1 11/02...

  • Page 77: Functional Descriptions

    The digital frequency control is divided between calibration and AFC. The VCO is module containing all the frequency determining parts inside. The VCO covers Issue 1 11/02 ãNokia Corporation Page 77...

  • Page 78: Fig 28 Block Schematic

    SCU bus from the UPP in the BB section. This also includes the AFC which is per- formed by the serial data from the UPP. The following figure shows a simplified block diagram of the Synthesizer Page 78 ãNokia Corporation Issue 1 11/02...

  • Page 79: Receiver

    All capacitors for both filters are located in the RF-ASIC. The gain characteristic of the BB amplifier is an amplifier with a maximum gain of 80 dB with an AGC range of 72 dB. Issue 1 11/02 ãNokia Corporation Page 79...

  • Page 80: Fig 29 Simplified Synthesizer

    1270 1000 10 dB fading margin 6 dB LNA ON LNA OFF Phone shall report RX-level accurately Phone shall report a constant RX-level (63) Accurate Gain range (calibrated) -110 -100 -48 dBm DC-compensation Page 80 ãNokia Corporation Issue 1 11/02...

  • Page 81: Transmitter

    8 for E-GSM900. There is no load-switch in GSM1800. The use of the load- switch means that the PA operates in high power mode at level 5 to 7 and low power mode at level 8 to 19. Issue 1 11/02 ãNokia Corporation Page 81...

  • Page 82: Synthesizer And Rf Control

    4.7k 100p Vant_900 Vant_1800 Mjoelner RFIC Detector diodes VPCL EGSM900 Rfbl PLFB2 Cfbl GSM1800 VPCH 100p Synthesizer and RF Control All control of the synthesizer, LNA, modulators on/of e.g. (all functionality that is Page 82 ãNokia Corporation Issue 1 11/02...

  • Page 83: Rf Characteristics

    Maximum phase error (RMS/peak) Max 5 deg RMS / max 20 deg. Peak Output power requirements, EGSM Table 41: Output power requirements, E-GSM Output Power requirements - E-GSM Parameter Unit / Notes Max. output power 33.0 Issue 1 11/02 ãNokia Corporation Page 83...
  • Page 84 600 to 1800 to 3000 to > 6000 Unit level 1800 3000 6000 Measurements BW: 30 kHz Measurements BW: 100 kHz < 33 dBm +0.5 Minimum abs. Level Output modulation spectrum - GSM1800 Page 84 ãNokia Corporation Issue 1 11/02...
  • Page 85 GSM 0505 1110 33 dBm EGSM 31 dBm 29 dBm 27 dBm 25 dBm 23 dBm <=21 dBm 1110 30 dBm GSM 1800 28 dBm 26 dBm 24 dBm 22 dBm <=20 dBm Issue 1 11/02 ãNokia Corporation Page 85...
  • Page 86 1000 MHz ... 1710 MHz 1710 MHz ... 1785 MHz 1785 MHz ... 12.75 GHz Intermodulation attenuation - GSM1800 only Table 48: Intermodulation attenuation, GSM1800 only. Intermodulation attenuation - GSM1800 only Offset Unit +/- 800 kHz Page 86 ãNokia Corporation Issue 1 11/02...

  • Page 87: Receiver Characteristics

    Peak deviation 20.0 Receiver characteristics Receiver characteristics. Table 52: Item E-GSM values GSM1800 values Type Direct conversion, nonlinear, FDMA/TDMA LO frequency range 3700...3840 MHz 3610...3760 MHz Typical 3 dB bandwidth +/- 91 kHz Issue 1 11/02 ãNokia Corporation Page 87...
  • Page 88 Blocking requirements, GSM1800 Blocking requirements - GSM1800 Frequency range Unit 600 kHz <= f – fo < 800 kHz dBm / in–band 1785 – 1920 MHz 800 kHz <= f – fo < 1.6 MHz Page 88 ãNokia Corporation Issue 1 11/02...
  • Page 89 Sensitivity, intermodulation and spurious rejection - GSM1800 Parameter Unit Reference sensitivity level -102 dBm, 15 to 35 deg. -100 dBm, -15 to 55 deg Intermodulation rejection dB, (-49 – (-100+3)) fo=2f1-f2, f2-f1=800 kHz Issue 1 11/02 ãNokia Corporation Page 89...
  • Page 90 Reference interference level, E-GSM / GSM1800 Reference interference level - E-GSM and GSM1800 Parameter Unit Cochannel interference ratio Adjacent (200 kHz) interference ratio Adjacent (400 kHz) interference ratio Adjacent (600 kHz) interference ratio Page 90 ãNokia Corporation Issue 1 11/02...

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