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Chapter2
PCI Dynamic Bursting
When Enabled, every write transaction goes to the write buffer.
Burstable transactions the burst on the PCI bus and nonburstable
transactions don't.
The Choices: Enabled (default), Disabled.
PCI Master 0 Ws Write
When Enabled, writes to the PCI bus are executed with zero-wait
states.
The Choices: Enabled (default), Disabled.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support
delay transactions cycles. Select Enabled to support compliance with
PCI specification.
The Choices: Enabled, Disabled (default).
PCI #2 Access #1 Retry
When enabled, PCI ＃ 2 will be disconnected if max retries are
attempted without success (default).
When disabled, PCI＃2 will not be disconnected until access finishes.
The Choices: Enabled (default), Disabled.
AGP device control
If you highlight the literal "Press Enter" next to the "AGP device control" label
and then press the enter key, it will take you a submenu with the following
options:
AGP Mode
This item allows you to select the AGP Mode.
The Choices: 1X, 2X, 4X (Default).
AGP Aperture Size
Select the size of the Accelerated Graphics Port (AGP)
The aperture is a portion of the PCI memory address range dedicated
for graphics memory address space. Host cycles that hit the aperture
range are forwarded to the AGP without any translation.
The Choices: 64M (default), 32M, 16M, 8M, 4M, 128M.
2-14
BIOS Setup
aperture.
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