Sony STR-ZA1000ES Service Manual page 90

STR-ZA1000ES/ZA2000ES/ZA3000ES
• IC Pin Function Description
AUDIO BOARD IC2502 ADSST-AVR-3046 (DSP)
Pin No. Pin Name
1 SDDQM
2 MS0
3 SDCKE
4 VDD_INT
5 CLK_CFG1
6 ADDR0
7 BOOT_CFG0
8 VDD_EXT
9 to 13 ADDR1 to ADDR5
14 BOOT_CFG1
15 GND
16, 17 ADDR6, ADDR7
18, 19 NC
20, 21 ADDR8, ADDR9
22 CLK_CFG0
23 VDD_INT
24 CLKIN
25 XTAL2
26 ADDR10
27 SDA10
28 VDD_EXT
29 VDD_INT
30 ADDR11
31 ADDR12
32 ADDR17
33 ADDR13
34 VDD_INT
35 ADDR18
RESETOUT/
36
RUNRSTIN
37 VDD_INT
38 MOSI
39 MISO
40 SPICLK
41 VDD_INT
42 DPI_P05
43 DSP_CS
44 MD
45 VDD_EXT
46 NC
47 RESET_MAIN
48 VDD_INT
49 UART_OUT
50 UART_IN
51 LED
52 to 56 NC
57 VDD_EXT
58 to 61 NC
62 VDD_INT
63, 64 NC
65 VDD_INT
66, 67 NC
68 VDD_INT
69 NC
70 WDTRSTO
90
I/O
O Data mask signal output to the SD-RAM
O Memory selection signal output to the SD-RAM
O Clock enable signal output to the SD-RAM
- Power supply terminal (+1.1V) (for core)
Core instruction rate to CLKIN (pin 24) ratio selection signal input terminal
I
Fixed at "L" in this unit
O Address signal output to the SD-RAM
I Boot mode selection signal input terminal
- Power supply terminal (+3.3V) (for I/O)
O Address signal output to the SD-RAM
I Serial data input from the system controller
- Ground terminal
O Address signal output to the SD-RAM
- Not used
O Address signal output to the SD-RAM
Core instruction rate to CLKIN (pin 24) ratio selection signal input terminal
I
Fixed at "L" in this unit
- Power supply terminal (+1.1V) (for core)
I System clock input terminal (25 MHz)
O System clock output terminal (25 MHz)
O Address signal output terminal
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V) (for I/O)
- Power supply terminal (+1.1V) (for core)
O Address signal output to the SD-RAM
O Address signal output terminal
O Bank address signal output to the SD-RAM
O Address signal output terminal
- Power supply terminal (+1.1V) (for core)
O Bank address signal output to the SD-RAM
I/O Reset signal output and running reset signal input terminal
- Power supply terminal (+1.1V) (for core)
I Serial data input from the system controller
O Serial data output to the system controller
I Serial data transfer clock signal input from the system controller
- Power supply terminal (+1.1V) (for core)
I Chip select signal input from the system controller
I Chip select signal input from the system controller
- Not used
- Power supply terminal (+3.3V) (for I/O)
- Not used
- Not used
- Power supply terminal (+1.1V) (for core)
O Serial data output terminal
I Serial data input terminal
- Not used
- Not used
- Power supply terminal (+3.3V) (for I/O)
- Not used
- Power supply terminal (+1.1V) (for core)
- Not used
- Power supply terminal (+1.1V) (for core)
- Not used
- Power supply terminal (+1.1V) (for core)
- Not used
O Watchdog timer reset signal output terminal
Description
Fixed at "H" in this unit
Not used
Not used
Not used
Not used
Not used
Not used
Not used