Block Diagram - Network Section (2/2) - Sony STR-ZA1000ES Service Manual

STR-ZA1000ES/ZA2000ES/ZA3000ES
STR-ZA1000ES/ZA2000ES/ZA3000ES
6-8.

BLOCK DIAGRAM - NETWORK Section (2/2) -

P6_OUTD[0] – P6_OUTD[3], P6_RXD0 – P6_RXD3,
P6_OUTEN, P6_OUTCLK, P6_RXCLK, P6_RXDV,
MDIO_CPU, MDC_CPU, ETHEPHY_HUB1_INT,
HUB2_INT, ETHEPHY_HUB1_RESET, HUB2_RESET
P6_OUTD[0]
>016B
P6_OUTD[1]
(Page 45)
P6_OUTD[2]
P6_OUTD[3]
P6_RXD0
P6_RXD1
P6_RXD2
P6_RXD3
P6_OUTEN
P6_OUTCLK
P6_RXCLK
P6_RXDV
MDIO_CPU
MDC_CPU
ETHEPHY_HUB1_INT
HUB2_INT
ETHEPHY_HUB1_RESET
HUB2_RESET
CN183 3
SETTING 2
DC5V 0.5A MAX
1
S-RAM
IC6606
I/O0 – I/O15
A0 – A17
WE 17
OE 41
BHE 40
BLE 39
SERIAL FLASH
IC6607
DO (IO1) 2
DI (IO0) 5
CLK 6
CS 1
46 46
ETHERNET CONTROLLER
IC6608 (1/2)
119 RXD0 UART_MU/EU 22
118 RXD1 UART_EU/MU 23
117 RXD2 ENDFLAG_EU_MU 2
116 RXD3 MD0 69
135 TXD0 INITX 49
134 TXD1
133 TXD2
RESET SIGNAL
132 TXD3 GENERATOR
IC6605
120 CRS_DV
123 REF_CLK
130 TCK
136 TX_EN
UART_SEL1/EU
121 MDIO UART_SEL1/EU 19
UART_EU/SEL1
122 MDC UART_EU/SEL1 20
SEL1_SEL
6 ETHPHY_HUB1_INTERRUPT SEL_SEL1 3
7 HUB2_INTERRUPT
137 ETHEPHY_HUB1_RESET
UART_SEL2/EU
138 HUB2_RESET PROG_EU_RX 102
UART_EU/SEL2
PROG_EU_TX 101
107 USB_D+
106 USB_D–
VBUS
16
DATA0 – DATA15
18
ADDR1 – ADDR18
14 WE
13 OE
16 BHE
15 BLE
26 FLASH_SIN
27 FLASH_SOT
28 FLASH_SCK
29 FLASH_CS
71 X1
X6600
4MHz
70 X0
SYSTEM CONTROLLER
IC8002 (4/6)
109 MU-EU TX
110 MU-EU RX
105 ENDFLAG_EU_MU
107 MODE0_MU_EU
106 RESET_MU_EU
+3.3V_FAN
UART_SEL1/EU,
UART_EU/SEL1, SEL1_SEL
>017B
(Page 47)
UART_SEL2/EU, UART_EU/SEL2
>018B
(Page 47)