4.8
EEPROM
4.8.1
Data EEPROM 24LC256T
The EEPROM is empty on delivery.
• 256 Kbit or not assembled
• 3 decoded address lines
• Connected to I
2
C controller 1 of the LS1028A
• 400 kHz I
2
C clock
• Device address is 0x57 / 101 0111b
4.8.2
Configuration EEPROM SE97B
The temperature sensor SE97BTP also contains a 2 Kbit (256 × 8 Bit) EEPROM. The EEPROM is divided into two parts.
The lower 128 bytes (address 00h to 7Fh) can be Permanent Write Protected (PWP) or Reversible Write Protected (RWP) by
software. The upper 128 bytes (address 80h to FFh) are not write protected and can be used for general purpose data storage.
Figure 10:
Memory Map SE97BTP EEPROM
The EEPROM can be accessed with the following two I
• EEPROM (Normal Mode):
• EEPROM (Protected Mode):
The configuration EEPROM contains a standard reset configuration at delivery.
The following table lists the parameters stored in the configuration EEPROM.
Table 8:
EEPROM, TQMLS1028A-specific data
Offset
Payload (byte)
0x00
–
0x20
6
(10)
0x30
8
(10)
0x40
Variable
The configuration EEPROM is only one of several options for storing the reset configuration.
By means of the standard reset configuration in the EEPROM, a correctly configured system can always be achieved by simply
changing the Reset Configuration Source.
If the Reset Configuration Source is selected accordingly, 4 + 4 + 64 + 8 bytes = 80 bytes are required for the reset configuration.
It can also be used for the Pre-Boot Loader PBL.
User's Manual l TQMLS1028A UM 0101 l © 2020, TQ-Systems GmbH
C addresses.
2
0x50 / 101 0000b
0x30 / 011 0000b
Padding (byte)
32
(10)
10
(10)
8
(10)
Variable
Size (byte)
Type
32
Binary
(10)
16
Binary
(10)
16
ASCII
(10)
64
ASCII
(10)
Page 15
Remark
(Not used)
MAC address
Serial number
Order code
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