Bootblock Code Checkpoint Codes - American Megatrends Megathon User Manual

Bootblock Code Checkpoint Codes

Code
E0h Verify the Boot Block BIOS checksum. Disable the internal
cache, DMA, and interrupt controllers. Initialize the system
timer. Start memory refresh.
E1h Initialize the chipset registers. Set the BIOS size to 128K.
Make the 512 KB base memory available.
E2h Test the base 64 KB of system memory. Send the BAT
command to the keyboard controller. Make sure that <Ctrl>
<Home> was pressed. Verify the main system BIOS
checksum.
E3h The main system BIOS is good. Transfer control to the main
system BIOS.
E4h Start the memory test.
E5h The memory test is over. Initialize the interrupt vector table.
E6h Initialize the DMA and interrupt controllers.
E7h Determine the CPU internal clock frequency.
E8h Initialize the I/O chipset, if any.
E9h Program the CPU clock-dependent chip set parameters.
EAh Enable the timer and the floppy diskette interrupt. Enable the
internal cache. Copy the boot block BIOS and pass control
to the boot block BIOS in the 0000h segment.
EDh Initialize the floppy drive.
EEh Look for a diskette in drive A:. Read the first sector of the
diskette.
EFh Floppy read error.
F0h Search for S804P.ROM in the root directory of the floppy
diskette in drive A:.
F1h The S804P.ROM file is not in the root directory.
F2h Read the FAT table. Analyze the FAT to find the clusters
occupied by the S804P.ROM.
F3h Start reading the S804P.ROM file, cluster by cluster.
F4h The S804P.ROM file is not the correct size.
F5h Disable the internal cache. Raise the Vpp. Enable Flash write
and reset the Flash ROM.
FBh Detect the flash type.
FCh Start erasing flash blocks.
FDh Program the Flash ROM in the E0000-EFFFFh region.
FEh Start programming Flash at F0000-FFFFF region.
FFh Flash programming is successful. The computer reboots.
42 Megathon PCI Motherboard User's Guide
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