Switches - IBM 7090 Instruction-Reference

Data processing system
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End Operation
The end operation indicator is turned on whenever the end operation trigger on
Systems 8.00.09.1 is turned on.
AND
The AND lamp indicates the condition of the AND trigger on Systems 2.09.46.1.
It
can be used to distinguish between the first and second E cycles of an ANS
operation.
It
is on during the first E cycle of an ANS or ANA and off during the
second E cycle of an ANS. See Figure 6.2-2.
CAQ
The CAQ indicator signifies the condition of the CAQ trigger on Systems 2.09.49.1.
It
denotes the difference between the first and succeeding E cycles of a CAQ instruction.
The trigger is off for the first E cycle and on for the remaining E cycles and I time of
next instruction. See Figure 6.2-2.
X Carry
The X carry lamp indicates the condition of the X carry trigger on Systems
2.12.76.1. The trigger is on when the machine is not in memory nullification mode
and a carry occurs from adder position 3. If the machine is in memory nullification
mode, a carry from adder position 4, when in 16K mode, or a carry from adder posi-
tion 5, when in 24K mode, turns on the trigger.
6.2.02
Switches
I-a Interlock Switch
The I-a interlock switch is effective only when the system is in manual status.
It
has two positions: automatic and manual. With both the automatic-manual and I-a inter-
lock switches set in the manual position, the computer will stop after executing each
instruction. With the I-a interlock switch set to automatic, the machine will not stop if
an I-a device is in operation. The normal setting (automatic) of the I-a interlock switch
allows the computer to continue at high speed after I-a selection, to allow normal opera-
tion of the I-a device.
The machine will stop after each instruction, providing no I-a
device or data channel is in use.
Continuous Enter Instruction (Figure 6.2-3)
The continuous enter instruction switch is effective in automatic or manual status.
With this switch on, all instructions are obtained from the operator's panel entry keys,
not memory. The instruction counter is not used and does not advance. The IC contents
will not be altered unless a skip, trap, or transfer results from the instruction in the
entry keys. If the system is in automatic status, the instruction will be executed at
normal operating speeds; if in manual status, the speed will be under control of multi-
step or single-step operations.
162

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