L3 FA5000 Maintenance Manual page 138

Table 104 Main Processor Troubleshooting Chart (Continued)
Item Function Type
ID
Watch Dog Timer;
ARINC 429 RX/TX; Did-
crete I/Ps and O/Ps;
FDR Data; Frequency
Counter; CSMU Inter-
face; Power Supply
Status
A003 − Watch Dog Timer;
CSMU ARINC 429 RX/TX; Did-
Inter- crete I/Ps and O/Ps;
face FDR Data; Frequency
Counter; CSMU Inter-
face; Power Supply
Status; ARINC 717;
RS422
Watch Dog Timer;
ARINC 429 RX/TX; Did-
crete I/Ps and O/Ps;
FDR Data; Frequency
Counter; CSMU Inter-
face; Power Supply
Status; ARINC 717;
RS422
Watch Dog Timer;
ARINC 429 RX/TX; Did-
crete I/Ps and O/Ps;
FDR Data; Frequency
Counter; CSMU Inter-
face; Power Supply
Status; ARINC 717;
RS422
A004 − Non−Volatile Memory:
Memor Configuration and Error
y Log
SEER
OM
Non−Volatile Memory:
Configuration and Error
Log
Use or disclosure of information on this sheet is subject to
the restrictions on the cover page of this document.
The document reference is online, please check the correspondence between the online documentation and the printed version.
AVIATION PRODUCTS
COMPONENT MAINTENANCE MANUAL
Model FA5000
Failure Local Effect
Mode
Single Event The FPGA ini-
Upset (SEU) tially does not
operate: It is in
an undeter-
mined condi-
tion
Over/Under The CSMU In-
Voltage terface fails:
The DSP and
FPGA internal
resources/re-
gisters are un-
able to com-
municate with
the CSMU
Incorrect O/P The CSMU In-
terface fails:
The DSP and
FPGA internal
resources/re-
gisters are un-
able to com-
municate with
the CSMU
Single Event The CSMU ini-
Upset (SEU) tially does not
operate
Loss of The SEEP-
Power ROM fails: Un-
able to stores
errors, identify
location, part
number, MAC
Address, or
perform Time
Sharing
Over/Under The SEEP-
Voltage ROM fails: Un-
able to stores
errors, identify
location, part
number, MAC
Address, or
perform Time
Sharing
Next Effect End Effect
The MP PWA The CVDR initially does not oper-
initially does ate: some data may be corrupt,
not operate lost and/or may not be recorded,
stored or copied NOTE: The cor-
rupted FPGA data is erased and
replaced
The MP PWA The CVDR fails to operate
fails to operate
The MP PWA The CVDR fails to operate
fails to operate
The MP PWA The CVDR initially does not op-
initially does erate: some data may be cor-
not operate rupt, lost and/or may not be re-
corded, stored or copied
NOTE: The DSP and the
FPGA's internal resources/re-
gisters reset and communica-
tion is re−restablished with the
CSMU
The MP PWA The CVDR PWA fails to oper-
fails to operate ate
The MP PWA The CVDR PWA fails to oper-
fails to operate ate
23–70−30
Testing & Fault Isolation
Rev. 02 Page 140
July 21/17