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Chapter 3. Programming Input/Output Operations
This chapter discusses the data flow to and from the 4979.
Specific topics are commands, status information and I/O
Instructions.
Data Transfer Operations
Data is transferred between the processor and the attach-
ment, in a parallel operation (16 data bits plus 2 parity
bits). The number of data words transferred and the
direction in which they move are determined by the I/O
command. The I/O command also determines whether data
is transferred to or from processor storage, under Direct
Program Control (DPC) only, or under Direct Program
Control and in Cycle Steal (CS) mode. The 4979 has a
maximum data transfer of 1920 characters per Device
Control Block (DCB). The processor storage buffer area
may vary in size from 0 to 1920 bytes, the maximum
number of character bytes contained in the display buffer
of the attachment, with no beginning or ending boundary
restrictions. There are no overrun conditions with the 4979.
Data is sequentially transferred to or from the display
buffer two bytes at a time. The beginning address of the
processor data table may be an odd or even address to allow
for program independent character alteration.
There is a one-to-one relationship between display
screen positions and the display refresh buffer addresses.
The data is transferred in EBCDIC (extended binary coded
decimal interchange code). Entries from the keyboard are
converted to EBCDIC within the attachment prior to being
placed in the display buffer. See Appendix A for character
to EBCDIC Conversion.
Direct Program Control (DPC)
Under direct program control, only one word of data moves
to or from processor storage at a time. After moving the
data, the processor continues processing other instructions.
Moving data under DPC does not cause interrupts.
Cycle Steal
When data is moved to or from processor storage by stealing
storage cycles (Cycle Steal mode), processing and I/O
operations are overlapped. Overlapping allows the processor
to execute other instructions while the display is
performing I/O operations.
Initiating a Display Operation
Every I/O instruction to the 4979 requires (in processor
storage):
1.
An Operate I/O instruction
2.
An I/O command, device address,
~nd
an immediate
data field
Operate I/O Instruction
The following description is an overview of the Operate
I/O Instruction (Figure 3-1). Refer to the IBM Series/l
Model
5 4955
Processor and Processor Features Description,
GA34-0021 or the IBM Series/l Model
3 4953
Processor
and Processor Features Description, GA34-0022, for a more
detailed description of the I/O Instruction.
All input/ output operations from the processor to the
display, are initiated by an I/O Instruction. An add ress
field (bits 16-31) and the R2 field (bits 8-10) in the
Operate I/O instruction point to a processor storage
location containing an IDCB (Immediate Device Control
Block). The IDCB is a two-word block of storage that
contains device directed I/O commands. Before issuing the
I/O instruction for an operation, the command field of the
IDCB (bits 0- 7) must be set, along with a device address
(bits 8-15), and any field of immediate data required by
the command in the IDCB (bits 16-31). The information
specified in the immediate field depends on the command to
be performed. The device address of the 4979 can be one
of 128 (0-127) possible device address combinations. This
address is determined by the Device Address field of the
IDCB. Bit 8 of this field must be zero.
Programming Input/Output Operations
3-1
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