Texas Instruments XDS110 User Manual page 3

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1 XDS110 Probe High-Level Block Diagram
2 Debug Connection (CTI-20) Pin Mapping
3 AUX Connection Signal Mapping
4 Setup Power Source Control
5 Probe-Supplied Power and Voltage Level
6 Enabling ET on Connect
7 Selecting XDS110
8 EnergyTrace Overview
9 EnergyTrace and the Toolbar
10 EnergyTrace Dynamic View
11 xdsdfu Screenshot
12 dbgjtag Screenshot JTAG Integrity Test
13 dbgjtag SWD Integrity Test
14 dbgjtag Scan Path Test
1 Acronyms and Definitions
2 Expansion Header Signal Mapping
3 LEDs and Probe Operational States
4 CTI to Other Adaptor Pin Mapping
5 Auxiliary Breakout Board Signal Mapping
SPRUI94 - January 2017
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