Xilinx LogiCore LogiCore PCI v3.0 Getting Started Manual page 50

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The final set of design files (the user application) is located in:
7.
8.
9.
10. Click Change Result File to display the EDIF Result File dialog box; then move the to
11. Name the file
Note: In practice, the directory for the EDIF result file does not need to be changed.
However, the sample processing scripts included with the example design assume that the
output EDIF files will be located in the synthesis directory.
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<Install Path>/vhdl/example/source
Navigate to the source directory, select the cfg_ping.vhd, pcim_top.vhd, and ping.vhd,
then click Add.
After adding the three final files (for a total of six source files), click OK to return to the
main project window.
In the Source Files list, view the list of newly added source files by double-clicking the
flowtest/vhdl folder (if it is not already open). Drag to reorder the source files in
the hierarchical order shown in
Figure 5-16: Project Window with Source Files
following directory:
<Install Path>/vhdl/example/synthesis
pcim_top.edf
to the main project window.
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Chapter 5: Synthesizing a Design
Figure 5-16.
and click OK to set the name of the result file and return
PCI v3.0.151 Getting Started Guide
UG157 August 31, 2005