Related Manuals for Texas Instruments TPS54380EVM-001
Summary of Contents for Texas Instruments TPS54380EVM-001
- Page 1 TPS54380EVM 001 3 Amp SWIFT Regulator Evaluation Module User’s Guide June 2003 PMP Systems Power SLVU087...
- Page 2 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products & application solutions:...
- Page 3 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
- Page 4 EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2003, Texas Instruments Incorporated...
- Page 5 A caution statement describes a situation that could potentially damage your software or equipment. This is an example of a warning statement. A warning statement describes a situation that could potentially cause harm to you. Related Documentation From Texas Instruments TPS54380 data sheet (literature number SLVS454)
- Page 6 Information About Cautions and Warnings Trademarks SWIFT is a trademark of Texas Instruments. PowerPAD is a trademark of Texas Instruments.
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Page 7: Table Of Contents
Contents Contents Introduction ..............Background . - Page 8 ........1–2 TPS54380EVM-001 Performance Specification Summary ......
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Page 9: Introduction
Introduction This chapter contains background information for the TPS54380 as well as support documentation for the TPS54380EVM-001 evaluation module (HPA001). The TPS54380EVM-001 performance specifications are given, with the schematic and bill of material for the TPS54380EVM-001. Topic Page Background .......... -
Page 10: Background
The TPS54380 tracking dc/dc converter is capable of direct tracking, ratiometric tracking, and voltage sequencing with a second power source. The TPS54380EVM-001 is a two-channel EVM demonstrating the flexibility inherent in the TPS54380 design for tracking and sequencing core and I/O voltages. -
Page 11: Performance Specification Summary
Table 1–2 compiled with no load on the I/O output. The input voltage range is limited to 5.5 V by the distribution switch. The maximum input voltage for the TPS54380 is 6 V. Table 1–2. TPS54380EVM-001 Performance Specification Summary Specification Test Conditions Units 3.3 or... -
Page 12: Modifications
Modifications 1.3 Modifications The TPS54380EVM–001 is designed to demonstrate the small size that can be attained when designing with the TPS54380, so many of the features, which allow for extensive modifications have been omitted from this EVM. Changing the value of R2 can change the output voltage in the range of 0.9 V to 3.3 V. -
Page 13: Power Sequencing
Modifications Figure 1–1. Frequency Trimming Resistor Selection Graph 60 70 80 90 100 110 120 130 140 150 160 170 180 Resistance – kΩ An onboard electrolytic input capacitor may be added at C1. 1.3.1 Power Sequencing By selecting different R6–R7 resistor divider ratios, different power sequencing scenarios can be set. - Page 15 Test Setup and Results This chapter describes how to properly connect, set up, and use the TPS54380EVM-001 evaluation module. The chapter also includes test results typical for the TPS54380EVM-001 and covers efficiency, output voltage regulation, load transients, loop response, output ripple, input ripple, and start...
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Page 16: Input/Output Connections
Input/Output Connections 2.1 Input/Output Connections The TPS54380EVM-001 has the following three input/output connectors: V J1, V I/O J2 and V Core J3. A diagram showing the connection points is shown in Figure 2–1. A power supply capable of supplying 5 A is connected to J1 through a pair of 20 AWG wires. -
Page 17: Efficiency
Efficiency 2.2 Efficiency The TPS54380EVM–001 efficiency peaks at load current of about 1 A to 2 A, and then decreases as the load current increases towards full load. Figure 2–2 shows the efficiency for the TPS54380 at an ambient temperature of 25°C. The efficiency is lower at higher ambient temperatures, due to temperature variation in the drain-to-source resistance of the MOSFETs. -
Page 18: Power Dissipation
2.3 Power Dissipation The low junction-to-case thermal resistance of the PWP package, along with a good board layout, allows the TPS54380EVM-001 EVMs to output full rated load current while maintaining safe junction temperatures. With a 3.3-V input source and a 3-A load, the junction temperature is approximately 60°C, while the case temperature is approximately 55°C. -
Page 19: Output Voltage Regulation
Output Voltage Regulation 2.4 Output Voltage Regulation The output voltage load regulation of the TPS54380EVM–001 is shown in Figure 2–4, while the output voltage line regulation is shown in Figure 2–5. Measurements are given for an ambient temperature of 25°C. Figure 2–4. -
Page 20: Load Transients
Load Transients 2.5 Load Transients The TPS54380EVM–001 response to load transients is shown in Figure 2–6. The current step is from 25% to 75% of maximum rated load. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output. -
Page 21: Loop Characteristics
Loop Characteristics 2.6 Loop Characteristics The TPS54380EVM–001 loop response characteristics are shown in Figure 2–7 and Figure 2–8. Gain and phase plots are shown for each device at minimum and maximum operating voltage. Figure 2–7. Measured Loop Response, TPS54380, V = 3 V MEASURED LOOP RESPONSE Phase... -
Page 22: Output Voltage Ripple
Output Voltage Ripple 2.7 Output Voltage Ripple The TPS54X73EVM–225 output voltage ripple is shown in Figure 2–9. The input voltage is 3.3 V for the TPS54380. Output current is the rated full load of 3 A. Voltage is measured directly across output capacitors. Figure 2–9. -
Page 23: Input Voltage Ripple
Input Voltage Ripple 2.8 Input Voltage Ripple The TPS54X73EVM–225 output voltage ripple is shown in Figure 2–10. The input voltage is 3.3 V for the TPS54380. Output current for each device is rated full load of 3 A. Figure 2–10. Input Voltage Ripple, TPS54380 V O (ac) 20 mV/div V phase 1 V/div Time Scale 1 µs/div... -
Page 24: Powering Up And Down
I/O voltage. If the resistors R6 = R1 and R7 = R2, then the core voltage tracks the I/O voltage. The start-up voltage waveform of the TPS54380EVM-001 for this condition is shown in Figure 2–11. The waveform shows that the core voltage regulator tracks the output of I/O regulator until the core regulator reaches its nominal 1.8-V level. -
Page 25: Powering Down With Tracking
Powering Up and Down Figure 2–12. Powering Down With Tracking V O I/O 500 mV/div V O CORE 500 mV/div Time Scale 1 ms/div The TPS54380EVM–001 EVM provides the ability to change the slew rate of output voltage of core regulator by using jumper JP2 (see schematic in Figure 4–1). -
Page 26: Powering Down With Ratiometric Sequencing
Powering Up and Down Figure 2–13. Powering Up With Ratiometric Sequencing V O I/O 500 mV/div V O CORE 500 mV/div Time Scale 500 µs/div Figure 2–14. Powering Down With Ratiometric Sequencing V O I/O 500 mV/div V O CORE 500 mV/div Time Scale 1 ms/div If jumper JP2 is set so that R8 is connected in parallel to R6, the core voltage... -
Page 27: Powering Up With Core Voltage Rising First
Powering Up and Down Figure 2–15. Powering Up With Core Voltage Rising First V O I/O 500 mV/div V O CORE 500 mV/div Time Scale 500 µs/div Figure 2–16. Powering Up With Core Voltage Falling Second V O I/O 500 mV/div V O CORE 500 mV/div Time Scale 1 ms/div... - Page 28 2-14...
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Page 29: Board Layout
Chapter 3 Board Layout This chapter provides a description of the TPS54380EVM–001 board layout and layer illustrations. Topic Page Layout ............Board Layout... -
Page 30: Layout
Layout 3.1 Layout The board layout for the TPS54380EVM-001 is shown in Figure 3–1 through Figure 3–3. The top-side layer of the TPS54380EVM–001 is laid out in a manner typical of a user application. The top and bottom layers are 1.5 oz. - Page 31 Layout Figure 3–2. Bottom Side Layout (looking from top side) Board Layout...
- Page 32 Layout Figure 3–3. Top Side Assembly...
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Page 33: Schematic And Bill Of Materials
Chapter 4 Schematic and Bill of Materials The TPS54380EVM–001 schematic and bill of materials are presented in this chapter. Topic Page Schematic ........... . Bill of Materials . -
Page 34: Schematic
Schematic 4.1 Schematic The schematic for the TPS54380EVM–001 is shown in Figure 4–1. Figure 4–1. TPS54380EVM–001 Schematic 0.1 µF 10 µF TPS2013D 220 µF VOUT I/O 0.1 µF 22 µF 10 kΩ TPS54380PWP 820 pF 82 pF PWRGD 590 Ω 10 µF 0.047 µF BOOT... -
Page 35: Bill Of Materials
Bill of Materials 4.2 Bill of Materials Table 4–1 contains the bill of materials for the TPS54380EVM–001. Table 4–1. TPS54380EVM-001 Bill of Materials Count RefDes Description Size Part Number Capacitor, POSCAP, 220 µF, 10 V, 40-mΩ, 20% – Sanyo 10TPB220M Capacitor, ceramic, 22 µF, 6.3 V, X5R, 20%...
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