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8 Block Diagram
8.1.
Digital P.C.B. Regulator Block Diagram
PW_X_SW5.9V
FROM
P1102
P58001
POWER P.C.B.
16,17,18
FROM BP2
SECTION
PW_X_SW12.2V
P1102
P58001
FROM
12,13,14,15
POWER P.C.B.
P1102
P58001
P_STANBY_H
FROM
23
POWER P.C.B.
IC56302
(REG.5V)
5
VIN
VOUT 4
HDMI_P_ON_H
1
ON
IC55001- M26
Only for BDT110 PU/PX
Only for BDT110GA/GN/GW/PU/PX
IC59307
(REG.5V)
2
4
IC59301
(REG.5V)
2
4
IC58004
(DC-DC CONVERTER)
IP58001
OUT2 H
15
1
2
20
VCC
OUT2 L
17
LX2
16
8
EN2
1
LX1 22
EN1
OUT1 H
23
OUT1 L
21
IC58003
(REG.PW_3.3V)
SW 3
2
VCC
5
FB
FROM BP2
SECTION
IC57005
(REG.5V)
2
1
Q58006
(REG.DR12V)
4
1
2
5
6
IC58302
(REG.PW_DR5V)
1
VIN
VOUT
3
Only for BDT110 PU/PX
2
CONT
IC55001
(REG.5V)
8
VIN
VOUT 4
5
CONT
IC57006
(REG.PW_X_SW3.3V)
5
VIN
VOUT 4
1
ON
IC59306
(REG.5.1V)
1
5
IC59303
(REG.5.1V)
1
5
Q58003
1
S1
D1
8
G1
2
D1
7
D2
6
4
G2
D2
5
Q58004
1
S1
D1
8
G1
2
D1
7
D2
6
4
G2
D2
5
IC56002
6
VCC
VOUT 2
VOUT_MUTE_L
1
PS
IC55001- K24
Only for BDT110 PU/PX
IP55002
1
2
28
IP55003
PW_DR5V
1
2
Q55009
Only for BDT110PU/PX
IC57001
2
2
DMP-BDT110GA/GC/GN/GT/GW
DMP-BDT110PU/PX
DIGITAL P.C.B. REGULATOR BLOCK DIAGRAM
IC51004-
D5V
39
IC51005- 4
5
6
10
14
21
/
/
/
/
/
A5V
P55001-
9
Only for BDT110 PU/PX
IC55003- 15
P56301-
18
IC51001- M24
IC7001- 13
43
/
5V
P59302- 1
5V
P59301 P6801
TO SD_USB
12
P.C.B.
PW_PK_D1.5V
IC51001-
VDDIQ，VDDIQCLK
PW_PK_D1.5V_CO
IC52001,IC52002,IC52201- VDD
PW_PK_D1.1V
IC51001- DDR,VDD
3.3V
P59301 P6801
TO SD_USB
8
P.C.B.
PW_ST_D3.3V
IC51001-
VDD33,AVDD_VPLL,AVSS_VPLL
AVDD_APLL,AVSS_APLL
AVDDHDPLL,AVSSHDPLL
HTAVDD,HTAVSS,VDDPUSB
VSSAPUSB,VDDAPUSB
AVDD33A,VDDSD
IC51301-
12 37
/
IC54001- 11 14
/
IC59020- 7
/
8
/
25
/
26
IC59305- 9 13
20
30
39
41
47
48
/
/
/
/
/
/
/
JK53002- 3
IC51001-
H25,P26
Only for BDT110 PU/PX
IC55003- 2
PW_DR12V
IC55004- 31 41
/
/
45
/
54
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