Events Start Trigger; Delaying Counter And Display Generator; Voltage To Frequency Converter - Tektronix 7D11 DIGITAL DELAY Service Instructions Manual

L .
receipt of a trigger. C535 and R535 couple a positive-going
transient to the base of 0538 whenever S555 is switched
from INDEPENDENT to one of the two slaved modes. This
ensures that the B time base is locked out initially by
forcing U543B to clear.
Events Start Trigger
The Events Start Trigger circuit is used to end holdoff in
the delay by events mode. The input impedance is
approximately 1 megohm, determined by R601 and R609.
CR605 and CR609 prevent overdriving the input by
clamping the input signal should it be excessive. The circuit
is a very high gain amplifier composed of 0620, 0624,
0628, and 0630. It has a dual FET input connected for a
zero temperature coefficient with no offset between the
gate and source of 0610A. The trigger LEVEL is adjustable
by R615. It varies the DC voltage at the base of 0620 and
compares it with that at the base of 0624.
The SLOPE
(+
or
-I,
selected by S615, determines
which collector is chosen for the output. In the + position,
0634 is turned off and the collector of 0628 is pulled high
through CR632, which reverse biases CR635. This causes
the output of 0630 to be routed through CR636 to the
base of 0637. I n the - position 0634 is turned on, pulling
the collector of 0630 high, reverse biasing CR636. The
output at the collector of 0628 is presented to the base of
0637 through CR635. 0637 provides isolation for the
trigger circuit output.
U640C and 0640 form a one-shot multivibrator. The
input is normally H I so the active input signal is a
negative-going transition. CR638 is a feed-through diode in
parallel with a delay circuit comprising U64OC, R638,
C639, CR639, and R639. The signal at the base of 0640 is
a negative-going pulse, the width of which is determined by
the delay through U640C, etc.
The output at pin 6 of the holdoff RS flip-flop formed
by U640B and U640A is reset to a HI logic level after each
reset cycle. The negative-going pulse at the collector of
0640 causes the holdoff flip-flop to change state so that a
LO logic level is presented at pin 6 of U640B. This ends
holdoff to allow the 7D11 trigger circuit to become active.
0641 conducts in the delay by time mode. This holds
pin 1 of U640A LO to allow holdoff to follow the timing
of U589A (see Fig. 2-8)_
DELAYING COUNTER
~
AND DISPLAY GENERATOR'Y
The Delaying Counter and Display Generator consists of
the Voltage to Frequency Converter, Up/Down Count
®
Theory of Operation-7D11 Service
Control, Up/Down Clock Steering, Power-On Initializer,
Reversible Counter, Counter Buffers, Delaying Counter,
Nines Detector, and the Nines Arm Gate.
Voltage To Frequency Converter
The Voltage to Frequency Converter provides the signal
used for incrementing the Reversible Counter, which
permits presetting the desired delay time or events count.
The DELAY TIME or EVENTS knob, R700, is spring
loaded to its mechanical and electrical center. Turning it
counterclockwise causes the delay count to be decreased;
turning it clockwise causes the delay count to be increased.
Rotating R700 applies either a positive or negative voltage
on its wiper. This condition is sensed by 0718 or 0721
through diodes CR712 or CR713 respectively, and, through
a separate path, by 0705. As 0718 and 0712 are turned on
they cause 0724 to conduct. 0724 is a current generator
that charges C725. The waveform at C725 is a voltage
sawtooth. The waveform is applied to source follower 0733
and through a zener diode network to emitter follower
0740. Emitter follower 0740 drives a common base stage,
0743, to output this sawtooth waveform to the inputs of
the steering network, U747 A and U747B, of the Reversible
Counter. It is also applied to inverter U749F to update the
number that is loaded into the Delaying Counter. Also, the
sawtooth is applied to the base of 0738. At the peak of the
sawtooth wave, the emitter of 0738 drives 0730 to
conduct, discharging C725. The waveform on C725 having
fallen, the feedback path through 0733, 0740, 0743,
0738, and 0730 collapses and C725 is permitted to start
charging again. The repetition rate is determined by the
collector current of 0718 and 0721 as determined by the
magnitude of the rotation of the DELAY TIME OR
EVENTS control, R700. Increasing the rotation of R700,
either clockwise or counterclockwise, is converted into
more charging current in C725, thereby increasing the
repetition frequency. This stage operates as a voltage to
frequency converter. In idle condition, 0730 is turned on
by current through CR729 to keep C725 from charging.
When setting the counter (rotating R700), 0721 turns on
0727 to reverse bias CR729, which prevents 0730 from
being turned on except through the feedback path.
The output of 0743, through U7 49F, resets (force
recycle) the circuits in the Outputs Processing and Events
Start Trigger (diagram 3). This, in turn, provides the reload
signal for U800-U812 to ensure that the Delaying Counter
is updated along with the Reversible Counter.
Up/Down Count Control and Steering. The output of
0743 is applied to the inputs of U747 to cause the
Reversible Counter to count either up or down. The
steering is derived from the voltage (positive or negative)
present when the DELAY TIME OR EVENTS knob, R700,
is turned. This voltage operates the Schmitt output circuit
formed by 0705 and 0707 to cause the count signal to be
gated through either U747A for counting up or through
U747B for counting down.
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